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参数资料
型号： MAX3062EEKA#TG16
厂商： Maxim Integrated Products
文件页数： 14/17页
文件大小： 0K
描述： IC TXRX RS485/422 SGL SOT23-8
产品培训模块： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装： 1
类型： 收发器
驱动器/接收器数： 1/1
规程： RS422，RS485
电源电压： 4.75 V ~ 5.25 V
安装类型： 表面贴装
封装/外壳： SOT-23-8
供应商设备封装： SOT-23-8
包装： 标准包装
其它名称： MAX3062EEKA#TG16DKR
MAX3060E/MAX3061E/MAX3062E
±15kV ESD-Protected, Fail-Safe, 20Mbps, Slew-Rate-
Limited RS-485/RS-422 Transceivers in a SOT
6
_______________________________________________________________________________________
SWITCHING CHARACTERISTICS—MAX3062E
(VCC = +5V ±5%, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V and TA = +25°C.) (Notes 1, 2)
Note 1: Overtemperature limits are guaranteed by design and are not production tested. Devices are tested at TA = +25°C.
Note 2: All currents into the device are positive; all currents out of the device are negative. All voltages are referred to device
ground, unless otherwise noted.
Note 3:
ΔVOD and ΔVOC are the changes in VOD and VOC, respectively, when the DI input changes state.
Note 4: This input current level is for the hot-swap enable (DE, RE) inputs and is present until the first transition only. After the first
transition, the input reverts to a standard high-impedance CMOS input with input current IIN1. For the first 10s, the input
current can be as high as 1mA. During this period the input is disabled.
Note 5: Maximum current level applies to peak current just prior to foldback-current limiting; minimum current level applies during
current limiting.
Note 6: The device is put into shutdown by bringing RE high and DE low. If the enable inputs are in this state for less than 50ns, the
device is guaranteed not to enter shutdown. If the enable inputs are in this state for at least 600ns, the device is guaranteed
to have entered shutdown.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Driver Input to Output
tDPLH,
tDPHL
Figures 3 and 5, RDIFF = 54
Ω,
CDIFF = 50pF
20
30
ns
Driver Output Skew
(tDPLH - tDPHL)
tDSKEW
Figures 3 and 5, RDIFF = 54
Ω,
CDIFF = 50pF
-10
+1
+10
ns
Driver Rise or Fall Time
tDR, tDF
Figures 3 and 5, RDIFF = 54
Ω,
CDIFF = 50pF
815
ns
Maximum Data Rate
fMAX
20
Mbps
Driver Enable to Output High
tDZH
Figures 4 and 6, CL = 100pF, S2 closed
250
500
ns
Driver Enable to Output Low
tDZL
Figures 4 and 6, CL = 100pF, S1 closed
250
500
ns
Driver Disable Time from Low
tDLZ
Figures 4 and 6, CL = 15pF, S1 closed
100
200
ns
Driver Disable Time from High
tDHZ
Figures 4 and 6, CL = 15pF, S2 closed
100
200
ns
Receiver Input to Output
tRPLH,
tRPHL
Figures 7 and 9; | VID |
≥ 2.0V;
rise and fall time of VID
≤ 4ns, CL = 15pF
45
80
ns
Differential Receiver Skew
(tRPLH - tRPHL)
tRSKD
Figures 7 and 9; | VID |
≥ 2.0V;
rise and fall time of VID
≤ 4ns, CL = 15pF
-10
-4
+10
ns
Receiver Enable to Output Low
tRZL
Figures 2 and 8, CL = 15pF, S1 closed
50
ns
Receiver Enable to Output High
tRZH
Figures 2 and 8, CL = 15pF, S2 closed
50
ns
Receiver Disable Time from Low
tRLZ
Figures 2 and 8, CL = 15pF, S1 closed
50
ns
Receiver Disable Time from HightRHZ
Figures 2 and 8, CL = 15pF, S2 closed
50
ns
Time to Shutdown
tSHDN
(Note 6)
50
180
600
ns
Driver Enable from Shutdown to
Output High
tDZH(SHDN) Figures 4 and 6, CL = 100pF, S2 closed
100
ns
Driver Enable from Shutdown to
Output Low
tDZL(SHDN) Figures 4 and 6, CL = 100pF, S1 closed
100
ns
Receiver Enable from Shutdown
to Output High
tRZH(SHDN) Figures 2 and 8, CL = 15pF, S2 closed
1.5
s
Receiver Enable from Shutdown
to Output Low
tRZL(SHDN) Figures 2 and 8, CL = 15pF, S1 closed
1.5
s
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