参数资料
型号: MAX3206EEBL+T
厂商: Maxim Integrated Products
文件页数: 2/9页
文件大小: 0K
描述: IC ESD PROT ARRAY 9-UCSP
标准包装: 2,500
电极标记: 6 通道阵列 - 单向
安装类型: 表面贴装
封装/外壳: 9-UFBGA,WLCSP
供应商设备封装: 9-UCSP(3x3)
包装: 带卷 (TR)
Low-Capacitance, 2/3/4/6-Channel, ±15kV ESD
Protection Arrays for High-Speed Data Interfaces
ABSOLUTE MAXIMUM RATINGS
V CC to GND ...........................................................-0.3V to +7.0V
I/O_ to GND ................................................-0.3V to (V CC + 0.3V)
Continuous Power Dissipation (T A = +70°C)
2 × 2 WLP (derate 11.5mW/°C above +70°C)...............920mW
3 × 2 WLP (derate 12.3mW/°C above +70°C)...............984mW
3 × 3 WLP (derate 14.1mW/°C above +70°C).............1128mW
6-Pin TDFN (derate 24.4mW/°C above +70°C) ..........1951mW
12-Pin TQFN (derate 16.9mW/°C above +70°C) ........1349mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature .....................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
4 WLP
Junction-to-Ambient Thermal Resistance ( θ JA )...............87°C/W
6 WLP
Junction-to-Ambient Thermal Resistance ( θ JA )...............84°C/W
9 WLP
Junction-to-Ambient Thermal Resistance ( θ JA )...............71°C/W
6 TDFN
Junction-to-Ambient Thermal Resistance ( θ JA )....................42°C/W
Junction-to-Case Thermal Resistance ( θ JC )...........................9°C/W
12 TQFN
Junction-to-Ambient Thermal Resistance ( θ JA )....................41°C/W
Junction-to-Case Thermal Resistance ( θ JC )...........................6°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
ELECTRICAL CHARACTERISTICS
(V CC = +5V ±5%, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +5V and T A = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
Supply Current
V CC
I CC
0.9
1
5.5
100
V
nA
Diode Forward Voltage
V F
I F = 10mA
0.65
0.95
V
T A = +25°C, ±15kV
Human Body Model,
I F = 10A
Positive transients
Negative transients
V CC + 25
-25
Channel Clamp Voltage
(Note 3)
V C
T A = +25°C, ±8kV
Contact Discharge
(IEC 61000-4-2), I F = 24A
Positive transients
Negative transients
V CC + 60
-60
V
T A = +25°C, ±15kV
Air-Gap Discharge
(IEC 61000-4-2), I F = 45A
Positive transients
Negative transients
V CC + 100
-100
Channel Leakage Current
Channel Input Capacitance
T A = 0°C to +50°C (Note 4)
V CC = 5V, bias of V CC /2
-1
5
+1
7
nA
pF
ESD PROTECTION
Human Body Model
IEC 61000-4-2
Contact Discharge
IEC 61000-4-2
Air-Gap Discharge
±15
±8
±15
kV
kV
kV
Note 2: Limits over temperature are guaranteed by design, not production tested.
Note 3: Idealized clamp voltages (L1 = L2 = L3 = 0) (Figure 1 ); see the Applications Information section for more information.
Note 4: Guaranteed by design. Not production tested.
2
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