参数资料
型号: MAX3845UCQ+TD
厂商: Maxim Integrated Products
文件页数: 4/19页
文件大小: 0K
描述: IC SW/CBL DRVR DVI/HDMI 100TQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 250
类型: HDMI/DVI 开关
应用: HDMI,DVI,接收器
安装类型: 表面贴装
封装/外壳: 100-TQFP 裸露焊盘
供应商设备封装: 100-TQFP-EP(14x14)
包装: 带卷 (TR)
MAX3845
Layout Considerations
The data inputs and outputs are the MAX3845’s most
critical paths, and great care should be taken to mini-
mize discontinuities on these transmission lines
between the connector and the IC. Here are some sug-
gestions for maximizing the performance of the
MAX3845:
Maintain 100
Ω differential transmission line imped-
ance into and out of the MAX3845.
The data and clock inputs should be wired directly
between the cable connector and IC without stubs.
An uninterrupted ground plane should be posi-
tioned beneath the high-speed I/Os.
Ground path vias should be placed close to the IC
and the input/output interfaces to allow a return cur-
rent path to the IC and the DVI/HDMI cable.
Use good high-frequency layout techniques and
multilayer boards with an uninterrupted ground
plane to minimize EMI and crosstalk.
For more information, refer to the schematic and board
layers of the Maxim evaluation kit,
MAX3845EVKIT.
Exposed-Pad Package and Thermal
Considerations
The exposed pad on the 100-pin TQFP-EP provides a
very low thermal resistance path for heat removal from
the IC. The pad is also electrical ground on the
MAX3845 and must be soldered to the circuit board
ground for proper thermal and electrical performance.
Refer to Maxim Application Note
HFAN-08.1: Thermal
Considerations of QFN and Other Exposed-Paddle
Packages for additional information.
Because the MAX3845 is a high-power device, it is
important to ensure that good heat dissipation is incor-
porated into the PCB design. The device’s temperature-
sense pin (TEMP) allows estimation of the junction
temperature to be made while the MAX3845 is operat-
ing. This information can be used to determine if the
PCB layout is dissipating heat properly.
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable Driver
12
______________________________________________________________________________________
Interface Models
MAX3845
EQUALIZATION
NETWORK
50
Ω
VCC
50
Ω
VCC
TMDS
INPUT+
TMDS
INPUT-
Figure 4. Simplified Input Circuit Schematic
MAX3845
TMDS
OUTPUT+
TMDS
OUTPUT-
TVS*
*TVS IS A "TRANSIENT VOLTAGE
SUPPRESSOR" CLAMP-CIRCUIT.
Figure 5. Simplified Output Circuit Schematic
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