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| 型号： | MAX4704EUB+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/11页 |
| 文件大小： | 0K |
| 描述： | IC MULTIPLEXER 4X1 10UMAX |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 功能： | 多路复用器 |
| 电路： | 1 x 4:1 |
| 导通状态电阻： | 60 欧姆 |
| 电压电源： | 单电源 |
| 电压 - 电源，单路/双路(±)： | 1.8 V ~ 5.5 V |
| 电流 - 电源： | 1µA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-µMAX |
| 包装： | 带卷 (TR) |
MAX4704
Low-Voltage, 60
Ω,
4:1 Analog Multiplexer in QFN
_______________________________________________________________________________________
7
Detailed Description
The MAX4704 low-voltage, 4-channel analog multiplexer
operates from a single +1.8V to +5.5V supply. When
powered from a +2.7V supply, the device has a 60Ω
(max) on-resistance (RON), with 3Ω (max) RON matching
and 5Ω (max) RON flatness. The digital logic inputs are
+1.8V-logic compatible from a +2.7V to +3.3V supply.
Applications Information
Digital Control Inputs
The MAX4704 logic inputs are +1.8V CMOS logic compati-
ble for 3V operation and TTL compatible for 5V operation of
V+. Driving ADD_ rail-to-rail minimizes power consumption.
Analog Signal Levels
Analog signals that range over the entire supply volt-
age (V+ to GND) are passed with very little change in
on-resistance (see
Typical Operating Characteristics).
The switches are bidirectional, so the NO_ and COM
pins can be either inputs or outputs.
Power-Supply Sequencing and
Overvoltage Protection
Caution: Do not exceed the absolute maximum rat-
ings because stresses beyond those listed may
cause permanent damage to devices.
Proper power-supply sequencing is recommended for all
CMOS devices. Always apply V+ before applying analog
signals, especially if the analog signal is not current limited.
If this sequencing is not possible, and if the analog inputs
are not current limited to <20mA, add a small-signal diode
(D1) as shown in Figure 1. If the analog signal can dip
below GND, add D2. Adding protection diodes reduces
the analog range to a diode drop (about 0.7V) below V+
(for D1), and a diode drop above ground (for D2).
On-resistance increases slightly at low supply voltages.
Maximum supply voltage (V+) must not exceed +6V.
Adding protection diode D2 causes the logic threshold
to be shifted relative to GND. TTL compatibility is not
guaranteed when D2 is added.
Protection diodes D1 and D2 also protect against some
overvoltage situations. In the circuit in Figure 1, if the
supply voltage is below the absolute maximum rating,
and if a fault voltage up to the absolute maximum rating
is applied to an analog signal pin, no damage will result.
POSITIVE SUPPLY
COM
NO
D2
D1
GND
Vg
V+
MAX4704
Figure 1. Overvoltage Protection Using Two External Blocking
Diodes
Pin Description
PIN
MAX
QFN-EP
NAME
FUNCTION
10
1
V+
Positive Supply Voltage
—
2, 8
N.C.
No Connection. Not internally connected.
1
3
NO2
Analog Switch 2. Normally open.
2
4
NO3
Analog Switch 3. Normally open.
3
5
NO1
Analog Switch 1. Normally open.
46
INH
Inhibit. Connect to GND for normal operation. Connect to logic-level high to turn all
switches off.
5
7
GND
Ground
6
9
ADDB
Address Decoder Selection B
7
10
ADDA
Address Decoder Selection A
8
11
NO0
Analog Switch 0. Normally open.
9
12
COM
Analog Switch Common Terminal
——
EP
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize
thermal performance; not intended as an electrical connection point (QFN package only).
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