参数资料
| 型号： | MAX4832ETT33C+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 7/12页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 3.3V .1A 6TDFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 3.3V |
| 输入电压： | 最高 5.5V |
| 电压 - 压降（标准）： | 0.075V @ 500mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 100mA（最小） |
| 电流 - 限制（最小）： | 115mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-WDFN 裸露焊盘 |
| 供应商设备封装： | 6-TDFN 裸露焊盘（3x3） |
| 包装： | 带卷 (TR) |
100mA LDO Linear Regulators with
Current-Limiting Switch
Pin Description
PIN
SOT23
1
2
3
4
TDFN
1
2
3
4
NAME
IN
GND
SHDN
FLAG
(MAX4832)
RESET
FUNCTION
Regulator Power Input. Bypass IN to GND with a 0.1μF ceramic capacitor. Install the bypass
capacitor as close to the device as possible.
Ground
Active-Low Shutdown Input. Drive SHDN low to shutdown the regulator. Drive SHDN high or
connect to IN for normal operation.
Overcurrent Flag. Open-drain FLAG goes low when the device senses sustained current
exceeding the current-limit threshold for a duration longer than the blanking time. FLAG is high
when SHDN is low or the device is in thermal shutdown.
Active-Low Reset Output. Push-pull RESET goes low when the voltage at OUT is below the reset
threshold or when the voltage at OUT is greater than IN. RESET is low when SHDN is low or the
(MAX4833) device is in thermal shutdown. After the reset condition terminates, RESET remains low for the
duration of the reset timeout period.
Soft-Start Control. Connect a capacitor, C SS , from SS to GND to program the output rise time at
5
5
SS
startup. No capacitor from SS to GND gives 1ms output rise time at startup. See the soft-start
response time plots in the Typical Operating Characteristics .
6
—
6
EP
OUT
EP
Regulator Output. Bypass OUT to GND with a 3.3μF or larger ceramic capacitor. The capacitor’s
ESR should be less than 0.2 ? for stable operation.
Exposed Pad. EP is internally connected to GND. Externally connect EP to GND to provide a low
thermal resistance path from the IC junction to the PC board.
Detailed Description
The MAX4832/MAX4833 are ultra-low quiescent current,
low-dropout linear regulators with an integrated current
limiter. These devices guarantee up to 100mA drive
capabilities and regulate the preset output voltage.
The MAX4832 has a flag output that asserts low when
the load current exceeds the current limit for more than
the blanking time (t BLANK ). The MAX4833 has a reset
output that asserts low when the regulator output volt-
age is below the reset threshold voltage (V RESET ).
V RESET is 87.5% of the nominal output voltage. Figure 1
shows the simplified functional diagram and Figure 2
shows the typical application circuits.
FLAG Output (MAX4832)
The open-drain FLAG output goes low and the LDO’s
pass transistor is latched off when the current in the
pass transistor is at its output current limit for more than
the blanking time (t BLANK ). Cycling IN, or SHDN (high
to low to high) brings the device out of its latched-off
state and back into normal operation.
RESET Output (MAX4833)
The RESET output asserts when one of the following
conditions occurs:
? The input voltage (V IN ) is below the input undervolt-
age lockout threshold (V UVLO ).
? The output voltage (V OUT ) is below the reset thresh-
old (V RESET ).
? SHDN is pulled low.
? The device is in thermal shutdown.
? When V OUT > V IN.
RESET remains low for the reset timeout period (t RESET )
after reset conditions are terminated. There are four
RESET timeout periods available as shown in the
Electrical Characteristics table. RESET is available in a
push-pull configuration as shown in the Selector Guide .
Shutdown
Pull SHDN low to shut down the LDO and reduce the
quiescent current consumption of the device from 90μA
to 0.1μA. In shutdown mode, the pass transistor, con-
trol circuit, and reference circuit are turned off. Connect
SHDN to a supply voltage greater than V IH to turn on
the LDO.
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