参数资料
型号: MAX4832ETT33C+T
厂商: Maxim Integrated
文件页数: 9/12页
文件大小: 0K
描述: IC REG LDO 3.3V .1A 6TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
稳压器拓扑结构: 正,固定式
输出电压: 3.3V
输入电压: 最高 5.5V
电压 - 压降(标准): 0.075V @ 500mA
稳压器数量: 1
电流 - 输出: 100mA(最小)
电流 - 限制(最小): 115mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-WDFN 裸露焊盘
供应商设备封装: 6-TDFN 裸露焊盘(3x3)
包装: 带卷 (TR)
100mA LDO Linear Regulators with
Current-Limiting Switch
Shutdown Discharge (MAX4833)
OUT discharges through a 900 ? internal resistor during
shutdown mode.
Reverse OUT to IN Current
When the output voltage is greater than the input volt-
age, the internal pass transistor turns off. To avoid
reverse-charging the input source, the current at IN is
guaranteed to be below 3μA when V OUT ≥ V IN .
Current Limit
The MAX4832/MAX4833 include an accurate internal
current-limiting circuit. OUT can be shorted to ground
indefinitely without damaging the part.
The MAX4832 latches off if the load current exceeds the
current limit for more than the blanking time (see the
FLAG Output section). During soft-start, the device does
not latch off to an overload condition. During an overload
condition, the MAX4833 holds the current at current limit
until the thermal limit is reached. Once the junction tem-
perature reaches +165°C, thermal shutdown occurs.
Thermal Shutdown
When the junction temperature (T J ) exceeds +165°C,
the LDO’s pass transistor turns off allowing the junction
to cool. The LDO’s pass transistor turns on again after
the IC’s junction temperature cools by 15°C, resulting in
a pulsed output during continuous thermal-overload
conditions.
Soft-Start
During power-up, the soft-start ensures that the output
ramps up slowly reducing inrush current peaks. See
the soft-start response time plots in the Typical
Operating Characteristics . The soft-start time (t SS ) is
given by the following equation:
t SS = C SS (ms)
where C SS is in nF.
A soft-start capacitor (C SS ) of 10nF gives a 10ms t SS . A
1ms minimum soft-start time is fixed internally to ensure
that the output rises slowly even without any external
capacitor at SS pin to ground. The device is in soft-start
mode when either the voltage at IN or SHDN is cycled
high to low to high.
Applications Information
Capacitor Selection and Regulator
Stability
For stable operation over the full temperature range and
with load currents up to 100mA, use a 3.3μF (min)
ceramic output capacitor with an ESR <0.2 ? . To reduce
noise and improve load transient response, stability, and
power-supply rejection, use larger output capacitor
values such as 10μF (note that some ceramic capacitors
exhibit large capacitance and ESR variation with temper-
ature). X7R capacitors provide good performance over
the -40°C to +85°C operating temperature range.
To improve power-supply rejection and transient
response, use a 0.1μF capacitor between IN and GND.
The MAX4832/MAX4833 remain stable with purely
resistive loads or current loads up to 100mA.
15kV Operational ESD Protection
A 3.3μF or higher value ceramic capacitor from OUT to
GND provides a 15kV (Human Body Model) protection
at OUT. The ESR value of the capacitor should be less
than 0.2 ? .
Reset Transient Immunity
The reset circuit is relatively immune to short duration,
falling V OUT transients. The Typical Operating
Characteristics show a graph of the Maximum Transient
Duration vs. Reset Threshold Overdrive for which reset is
not asserted. The graph was produced using falling V OUT
transients starting at V OUT and ending below the reset
threshold by the magnitude indicated (reset threshold
overdrive). The graph shows the maximum pulse width
that a falling V OUT transient can typically have without
triggering the reset pulse. As the amplitude of the tran-
sient increases (i.e., goes further below the reset thresh-
old), the maximum allowable pulse width decreases.
Typically, a V OUT transient that goes only 10mV below the
reset threshold and lasts up to 54μs does not trigger a
reset pulse.
Layout
When using the TDFN package, connect its exposed
paddle to GND to provide a low thermal resistance
path for heat transfer from the IC junction to the printed
circuit board.
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