参数资料
型号: MAX5003CSE+T
厂商: Maxim Integrated Products
文件页数: 15/16页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO VM 16SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.2MHz
占空比: 75%
电源电压: 11 V ~ 110 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
High-Voltage PWM
Power-Supply Controller
zero at 2kHz, the crossover frequency is 4kHz and the
phase margin is 50°.
Given the above considerations, R A , R B , R F , and C F
can be chosen (Figure 2). The sum of R A and R B is
chosen for low current drain. In the example, R A plus
R B is 58k ? and draws 80μA. The following ratio sets
the output voltage:
R B / (R A + R B ) = V SET / V OUT
Since V SET = 1.5V and V OUT = 5V, R A is set to 41.2k ?
and R B to 17.4k ? .
The midband gain is the ratio of R F /R A . R B does not
desired value, the center-point voltage will be 1.5V. The
Thevenin equivalent of the resistors must be low
enough so the error amplifier bias current will not intro-
duce a division error. The two resistors must have simi-
lar temperature coefficients (tempcos), so the dividing
ratio will be constant with temperature.
Component Selection
CS Resistor
The CS resistor is connected in series with the source
of the N-channel MOSFET and ground, sensing the
switch current. Its value can be calculated from the fol-
lowing equation:
affect the gain because it is connected to a virtual
ground. For a midband gain of 5, the feedback resistor
equals 200k ? . To set the zero at 2kHz, the capacitor
value is:
C F = 1 / (2 π x R F x f z ) = 400pF
R CS =
100 mV
I LIM ( PRI )
=
100 mV
2 PWR OUT ( MAX )
L PRI × ? SW × η
× K TOL
Layout Recommendations
All connections carrying pulsed currents must be very
short, be as wide as possible, and have a ground plane
behind them whenever possible. The inductance of
these connections must be kept to an absolute mini-
mum due to the high di/dt of the currents in high-
frequency switching power converters. In the develop-
ment or prototyping process, multipurpose boards, wire
wrap, and similar constructive practices are not suit-
able for these type of circuits; attempts to use them will
fail. Instead, use milled PC boards with a ground plane,
or equivalent techniques
Current loops must be analyzed in any layout pro-
posed, and the internal area kept to a minimum to
reduce radiated EMI. The use of automatic routers is
discouraged for PC board layout generation in the
board area where the high-frequency switching con-
verters are located. Designers should carefully review
the layout. In particular, pay attention to the ground
connections. Ground planes must be kept as intact as
possible. The ground for the power-line filter capacitor
and the ground return of the power switch or current-
sensing resistor must be close. All ground connections
must resemble a star system as much as practical.
“Short ” and “close ” are dimensions on the order of
0.25in to 0.5in (0.5cm to about 1cm).
Setting the Output Voltage
The output voltage of the converter, if using the internal
error amplifier, can easily be set by the value of the FB
pin set voltage. This value is 1.5V. A resistive divider
must be calculated from the output line to ground, with
a dividing ratio such that when the output is at the
where η = efficiency and 0.5 < KT OL < 0.75.
K TOL includes the tolerance of the sensing resistor, the
dispersion of the MAX5003 CS trip point, and the
uncertainties in the calculation of the primary maximum
current.
The sensing resistor must be of the adequate power
dissipation and low tempco. It must also be noninduc-
tive and physically short. Use standard surface-mount
CS resistors. A 100 ? resistor is recommended between
the CS resistor and the CS pin. If the current surge at
the beginning of the conduction period is large and dis-
rupts the MAX5003 ’s operation, add a capacitor
between the CS pin and PGND, to form an RC filter.
Power Switch
The MAX5003 will typically drive an N-channel MOSFET
power switch. The maximum drain voltage, maximum
R DS(ON) , and total gate switching charge are the para-
meters involved in choosing the FET. The maximum
gate switching charge is the most important factor
defining the MAX5003 internal power consumption,
since the product of the switching frequency and the
total gate charge is the IC current consumption.
R DS(ON) is the parameter that determines the total con-
duction power losses in the switch, and the choice
depends on the expected efficiency and the cooling
and mounting method. The maximum drain voltage
requirements can be different depending on the topolo-
gy used. In the flyback configuration, the maximum
voltage is the maximum supply voltage plus the reflect-
ed secondary voltage, any ringing at the end of the
conduction period, and the spike caused by the leak-
age inductance. In the case of the forward converter,
the reset time of the core will set the maximum voltage
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15
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