参数资料
型号: MAX5003ESE+T
厂商: Maxim Integrated Products
文件页数: 6/16页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO VM 16SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.2MHz
占空比: 75%
电源电压: 11 V ~ 110 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
High-Voltage PWM
Power-Supply Controller
Typical Operating Characteristics (continued)
(V DD = +12V, R FREQ = 200k ? , R MAXTON = 200k ? , T A = +25°C, unless otherwise noted.)
MAXIMUM FREQUENCY vs. INPUT VOLTAGE
10
9
V CC LOAD REGULATION
AND FET TOTAL GATE-SWITCHING CHARGE
350
8
7
6
5
4
300
250
200
150
10nC
20nC
25nC
30nC
3
100
15nC
2
1
0
V+ = V ES = 12V TO 36V
V DD = UNCONNECTED
50
0
0
5
10
15
20
12
13
14
15
16
I CC (mA)
V+ (V)
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
NAME
V+
INDIV
ES
FREQ
SS
REF
CON
COMP
FB
MAXTON
FUNCTION
Preregulator Input. Connect to the power line for use with 25V to 110V line voltages. Bypass V+ to ground
with a 0.1μF capacitor, close to the IC. Connects internally to the drain of a depletion FET preregulator.
Undervoltage Sensing and Feed-Forward Input. Connect to the center point of an external resistive divider
connected between the main power line and AGND. Undervoltage lockout takes over and shuts down
the controller when V INDIV < 1.2V. INDIV bias is typically 0.01μA.
Preregulator Output. When V+ ranges above 36V, bypass ES to AGND with a 0.1μF capacitor close to
the IC. When V+ is always below 36V, connect ES to V+.
Oscillator Frequency Adjust and Synchronization Input. In internal free-running mode, the voltage on this
pin is internally regulated to 1.25V. Connect a resistor between this pin and AGND to set the PWM fre-
quency. Drive between V IL and V IH at four times the desired frequency for external synchronization.
Soft-Start Capacitor Connection. Ramp time to full current limit is approximately 0.5ms/nF. Limits duty
cycle when V SS < V CON .
Reference Voltage Output (3.0V). Bypass to AGND with a 0.1μF capacitor.
Control Input of the PWM Comparator
Compensation Connection. Output of the error amplifier, available for compensation.
Feedback Input. Regulates to V FB = V REF / 2 = 1.5V.
Maximum On-Time Programming. A resistor from MAXTON to AGND sets the PWM gain and limits the
maximum duty cycle. The voltage on MAXTON tracks the voltage on the INDIV pin. Maximum on-time is
proportional to the value of the programming resistor. The maximum duty cycle is limited to 75%, regard-
less of the programming resistor.
6
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