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| 型号： | MAX5059AUI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 16/25页 |
| 文件大小： | 0K |
| 描述： | IC DRVR SYNC RECT 28-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 电源 |
| 电流 - 电源： | 2.5mA |
| 电源电压： | 9.3 V ~ 28 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.173"，4.40mm 宽）裸露焊盘 |
| 供应商设备封装： | 28-TSSOP 裸露焊盘 |
| 包装： | 带卷 (TR) |
Parallelable Secondary-Side Synchronous Rectifier
Driver and Feedback-Generator Controller ICs
Figure 8 shows a typical configuration with output volt-
ages high enough (V OUT > 2.5V) to allow a typical
V OUT > 2.5V
optocoupler to be fully biased. In this case, there are
two feedback paths—one though the error amplifier
C27
R19
R12
and one through the output-connected optocoupler.
This second feedback path must be considered when
compensating the overall feedback loop.
Figure 9 shows a typical configuration with an optocou-
R12
pler for output voltages lower than 2.5V. In this case,
the direct connection of the optocoupler to the output is
not possible. There is only one feedback path and the
E/A
COMPV
13
INV
14
C28
error-amplifier feedback network must be designed
accordingly.
Figure 10 shows the simplified block diagram for the
error amplifier.
Voltage Margining
The margining inputs MRGU (margin up) and MRGD
I REF
50 μ A
I REF
12
R12
(margin down) control two internal MOSFETs with open-
drain outputs at RMGU and RMGD, respectively. When
margining is used, connect two pullup resistors from
RMGU and RMGD to I REF . A logic-high voltage at
MRGU causes QMU (see Figure 1) to open, increasing
the equivalent resistance at I REF and the reference volt-
Figure 8. Optocoupler Connection for VOUT > 2.5V
V REG
(PIN 23)
0.5V < V OUT < 2.5V
age (V IREF ). The error-amplifier inverting input, INV,
tracks I REF and forces the primary-side controller to
increase the output voltage. MRGD has the opposite
effect. When a logic high is applied to MRGD, QMD
turns on, decreasing the equivalent resistance at I REF
and effectively reducing V IREF . This causes INV to track
and force the primary-side controller to reduce the out-
C27
R19
Rff
put voltage.
The margining inputs MRGU and MRGD are internally
pulled to GND with 40k Ω resistors. When margining is
not used, the inputs can be left floating or connected to
GND to make V IREF = 50μA × R12.
Calculation Procedure for Output-Voltage Setting
COMPV C28
13
Rf
R1
Cf
Resistors and Margining
Use the following step-by-step procedure to calculate
the output-voltage setting and margining resistors (see
E/A
INV
14
the Typical Application Circuit ):
INV
COMPV
I REF
50 μ A
I REF
12
14
I REF
13
R12
Figure 9. Optocoupler Connection for VOUT < 2.5V
12
Figure 10. Simplified Error-Amplifier Diagram
16
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| MAX5059EUI | 功能描述:功率驱动器IC Secondary Side Synch Rectifier Driver RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| MAX5059EUI+ | 功能描述:功率驱动器IC Secondary Side Synch Rectifier Driver RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| MAX5059EUI+T | 功能描述:功率驱动器IC Secondary Side Synch Rectifier Driver RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| MAX5059EUI-T | 功能描述:功率驱动器IC Secondary Side Synch Rectifier Driver RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| MAX505ACAG | 功能描述:数模转换器- DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
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