参数资料
型号: MAX5089ATE+
厂商: Maxim Integrated Products
文件页数: 11/24页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 2A 16TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 20 V
输入电压: 4.5 V ~ 23 V
PWM 型: 电压模式
频率 - 开关: 312kHz ~ 2.1MHz
电流 - 输出: 2A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-WQFN 裸露焊盘
包装: 管件
供应商设备封装: 16-TQFN-EP(5x5)
2.2MHz, 2A Buck Converters with an
Integrated High-Side Switch
Detailed Description
PWM Controller
The MAX5088/MAX5089 use a pulse-width modulation
(PWM) voltage-mode control scheme. The MAX5088 is
a nonsynchronous converter and uses an external low-
forward-drop Schottky diode for rectification. The
MAX5089 is a synchronous converter and drives a low-
side, low-gate-charge MOSFET for higher efficiency.
The controller generates the clock signal from an inter-
nal oscillator or the SYNC input when driven by an
external clock. An internal transconductance error
amplifier produces an integrated error voltage at
COMP, providing high DC accuracy. The voltage at
COMP sets the duty cycle using a PWM comparator
and an internal 1V P-P voltage ramp. At each rising
edge of the clock, the converter’s high-side n-channel
MOSFET turns on and remains on until either the
appropriate or maximum duty cycle is reached or the
maximum current limit for the switch is detected.
MAX5088
During each high-side MOSFET on-time (Figure 5), the
inductor current ramps up. During the second half of
the switching cycle, the high-side MOSFET turns off and
forward biases the Schottky rectifier (D2 in Figure 5).
During this time, the SOURCE voltage is clamped to
0.5V below ground. The inductor releases the stored
energy as its current ramps down, and provides current
to the output. During the MOSFET off-time, when the
Schottky rectifier is conducting, the bootstrap capacitor
(C10 in Figure 5) is recharged from the V L output. At
light loads, the MAX5088 goes in to discontinuous con-
duction mode operation when the inductor current com-
pletely discharges before the next switching cycle
commences. When the MAX5088 operates in discontin-
uous conduction, the bootstrap capacitor can become
undercharged. To prevent this, an internal low-side 30 ?
switch (see N3 in Figure 1) turns on, during the off-time,
once every 4 clock cycles. This ensures that the nega-
tive terminal of the bootstrap capacitor is pulled to
PGND often enough to allow it to fully charge to V L ,
ensuring the internal power switch properly turns on.
The operation of the bootstrap capacitor wake-up
switch causes a small increase in the output voltage rip-
ple at light loads. Under overload conditions, when the
inductor current exceeds the peak current limit of the
internal switch, the high-side MOSFET turns off quickly
and waits until the next clock cycle.
MAX5089
The MAX5089 is intended for synchronous buck opera-
tion only. During the high-side MOSFET on-time, the
inductor current ramps up. When the MOSFET turns off,
the inductor reverses polarity and forward biases the
Schottky rectifier in parallel with the low-side synchro-
nous MOSFET. The SOURCE voltage is clamped to
0.5V below ground until the break-before-make time
(t BBM ) of 25ns is over. After t BBM, the synchronous rec-
tifier MOSFET turns on. The inductor releases the
stored energy as its current ramps down, and contin-
ues providing current to the output. The bootstrap
capacitor is also recharged from the V L output when
the MOSFET turns off. The synchronous rectifier keeps
the circuit in continuous conduction mode operation
even at light load. Under overload conditions, when the
inductor current exceeds the peak current limit of the
internal switch, the high-side MOSFET turns off and
waits until the next clock cycle.
The MAX5089, with the synchronous rectifier driver out-
put (DL), has an adaptive break-before-make circuit to
avoid cross conduction between the internal power
MOSFET and the external synchronous rectifier MOSFET.
When the synchronous rectifier MOSFET is turning off,
the internal high-side power MOSFET is kept off until
V DL falls below 0.97V. Similarly, DL does not go high
until the internal power MOSFET gate voltage falls
below 1.24V.
Input Voltage (V+)/Internal Linear
Regulator (V L )
All internal control circuitry operates from an internally
regulated nominal voltage of 5.2V (V L ). At higher input
voltages (V+) of 5.5V to 23V, V L is regulated to 5.2V. At
5.5V or below, the internal linear regulator operates in
dropout mode, where V L follows V+. Depending on the
load on V L , the dropout voltage can be high enough to
reduce V L to below the undervoltage lockout (UVLO)
threshold.
For input voltages of lower than 5.5V, connect V+ and
V L together. The load on V L is proportional to the
switching frequency of the converter. See the V L
Output Voltage vs. Switching Frequency graph in the
Typical Operating Characteristics . For an input voltage
higher than 5.5V, use the internal regulator.
Bypass V+ to SGND with a low-ESR 0.1μF or greater
ceramic capacitor placed as close as possible to the
MAX5088/MAX5089. Current spikes from V L disturb the
internal circuitry powered by V L . Bypass V L with a low-
ESR 0.1μF ceramic capacitor to PGND and a low-ESR
4.7μF ceramic capacitor to SGND.
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