参数资料
型号: MAX5091BATA+T
厂商: Maxim Integrated
文件页数: 11/15页
文件大小: 0K
描述: IC REG LDO 3.3V .1A 8-TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 3.3V
输入电压: 5 V ~ 28 V
电压 - 压降(标准): 0.3V @ 100mA
稳压器数量: 1
电流 - 输出: 100mA
电流 - 限制(最小): 160mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-TDFN-EP(3x3)
包装: 标准包装
产品目录页面: 1411 (CN2011-ZH PDF)
其它名称: MAX5091BATA+TDKR
28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
Applications Information
Available Output Current Calculation
The MAX5091 high-voltage regulator provides up to
After determining the allowable package dissipation, cal-
culate the maximum output current using the following
formula:
100mA of output current. The input voltage extends to
+28V. Package power dissipation limits the amount of
output current available for a given input/output voltage
I OUT(MAX) ?
P D
V S ? V OUT
P D = ?
and ambient temperature. Figure 2 depicts the maxi-
mum power dissipation curve for the 8-pin SO-EP pack-
age. The graph assumes that the exposed metal back
of the MAX5091 package is soldered to copper on a
single layer PCB according to the JEDEC51 standard.
Use Figure 2 to determine the allowable package dissi-
pation for a given ambient temperature. Alternately, use
the following formula to calculate the allowable pack-
age dissipation:
? 1.538W For T A ≤ + 70 ° C
? 1.538 ? 0.01923 ( T A ? 70 ° C ) For + 70 ° C < T A ≤ + 125 ° C
The above equations do not include the power dissipation
from self-heating due to the IC ground current.
The junction-to-ambient thermal impedance depends
on the area of the copper plane, its thickness, and the
number of copper layers on PCB. For the higher power
dissipation requirement, use multiple-layered PCBs
with 2oz copper and a large copper area.
Capacitor Selection and
Regulator Stability
For stable operation over the full temperature range and
with load currents up to 100mA, use a 10μF output
capacitor with a low ESR. Table 1 shows a list of recom-
mended output capacitor ESR for various load conditions.
2.0
1.8
1.6
1.538W
8-PIN SO-EP
Table 1. Recommended Output Capacitor
ESR
1.4
1.2
1.0
DERATE
19.23mW/ ° C
I OUT
I OUT ≤ 10mA
RECOMMENDED C OUT ESR
V OUT = 3.3V
C ESR < 0.66 Ω
V OUT = 5.0V
C ESR < 1 Ω
0.8
0.6
I OUT ≤ 50mA
I OUT ≤ 100mA
C ESR < 0.132 Ω
C ESR < 66m Ω
C ESR < 0.2 Ω
C ESR < 0.1 Ω
0.4
0.2
0
10
20
30
40
50
60
70
80
90
110 130 150
100 120 140
TEMPERATURE ( ° C)
Figure 2. 8-Pin SO-EP Maximum Power Dissipation vs.
Temperature
______________________________________________________________________________________
11
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