参数资料
型号: MAX5092BATE+
厂商: Maxim Integrated
文件页数: 4/24页
文件大小: 0K
描述: IC REG DL BUCK/LINEAR 16TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
拓扑: 降压(降压)(1),线性(LDO)(1)
功能: 车载
输出数: 2
频率 - 开关: 1MHz
电压/电流 - 输出 1: 7V/可调至11V,250mA
电压/电流 - 输出 2: 5V/1.5 V ~ 9 V,250mA
带 LED 驱动器:
带监控器:
带序列发生器:
电源电压: 3.5 V ~ 72 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-WQFN 裸露焊盘
供应商设备封装: 16-TQFN-EP(5x5)
包装: 管件
4V to 72V Input LDOs with Boost Preregulator
ELECTRICAL CHARACTERISTICS (continued)
(V IN = V EN = 14V, I OUT = 1mA, C IN = 47μF, C BSOUT = 22μF, C OUT = 10μF, C VL = 1μF, T A = T J = -40°C to +125°C, unless otherwise
noted. See Figures 4–7 as applicable. Typical specifications are at T A = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ENABLE, HOLD and RESET
EN High Input Threshold
EN Low Input Threshold
EN H
EN L
2.4
0.4
V
V
EN Input Bias Current
HOLD Low Input Threshold
I EN
V IL
Regulator on, EN transition from high to low
0.25
2
0.4
μA
V
HOLD Release Voltage
HOLD Pullup Current
V IH
I HOLD
EN = low
Internally connected to OUT
V OUT -
0.4
4
V
μA
RESET Voltage Threshold
V RESET
% of V OUT , V OUT falling
87
90
92
%
RESET Threshold Hysteresis
RESET Output Low Voltage
RESET Output High Leakage
Current
RESET Output Minimum Timeout
Period
EN to RESET Minimum Timeout
Delay
V RHYST
V RL
I RH
% of V OUT
I SINK = 1mA
V R ESE T = 5V
C CT not connected
C CT not connected
2
25
260
0.4
1
%
V
μA
μs
μs
Delay Comparator Threshold
(Rising)
Delay Comparator Threshold
Hysteresis
CT Charge Current
CT Discharge Current
Thermal Shutdown Temperature
Threshold
Thermal Shutdown Temperature
Hysteresis
V CTTH
V CTTH-HYS
I CT-CHG
I CT-DIS
T J(SHDN)
T J(HYST)
Temperature rising
1.205
1.5
1.24
100
2
5
165
20
1.265
2.5
V
mV
μA
mA
°C
°C
Note 2:
Note 3:
Note 4:
Note 5:
Limits at -40°C are guaranteed by design and characterization; not production tested.
Guaranteed minimum operating voltage is 3.5V on V IN falling only.
Guaranteed by design and not production tested.
The boost converter disable threshold (V BST_DIS ) is a static measurement. Internal comparator delay may cause a higher
disable level.
Note 6: The continuous maximum output current from the LDO is guaranteed according to the maximum power dissipation imposed
by the package thermal constraints.
Note 7: Maximum output adjustable value is conditioned by the maximum adjustable BSOUT Output Voltage Range minus the maxi-
mum dropout across the pass transistor.
Note 8: Dropout voltage is defined as (V BSOUT - V OUT ) when V OUT is 2% below the value of V OUT for V BSOUT = V OUT + 2V.
4
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