参数资料
型号: MAX5098AATJ+T
厂商: Maxim Integrated Products
文件页数: 12/28页
文件大小: 0K
描述: IC REG BUCK BST ADJ 1A/2A 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压),升压(升压)
输出类型: 可调式
输出数: 2
输出电压: 0.8 V ~ 0.85 V,4.5 V ~ 28 V
输入电压: 4.5 V ~ 19 V
PWM 型: 电压模式
频率 - 开关: 200kHz ~ 2.2MHz
电流 - 输出: 1A,2A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 32-TQFN-EP(5x5)
Dual, 2.2MHz, Automotive Buck or Boost
Converter with 80V Load-Dump Protection
Pin Description (continued)
PIN
16
17
18
19
20
21
22, 23
24, 25
26
27
28
29, 30
31
NAME
BYPASS
FSEL_1
COMP1
FB1
EN1
PGOOD1
DRAIN1
SOURCE1
BST1/VDD1
VDRV
CKO
PGND1,
PGND2
BST2/VDD2
EP
FUNCTION
Reference Output Bypass Connection. Bypass to SGND with a 0.22μF or greater ceramic capacitor.
Converter 1 Frequency Select Input. Connect FSEL_1 to V L for normal operation. Connect FSEL_1 to SGND
to reduce converter 1’s switching frequency to 1/2 of converter 2’s switching frequency (converter 1
switching frequency is 1/4 the CKO frequency). Do not leave FSEL_1 unconnected.
Converter 1 Internal Transconductance Amplifier Output. See the Compensation section.
Converter 1 Feedback Input. Connect FB1 to a resistive divider between converter 1’s output and SGND to
adjust the output voltage. To set the output voltage below 0.8V, connect FB1 to a resistive voltage-divider
from BYPASS to regulator 1’s output (Figure 3). See the Setting the Output Voltage section.
Converter 1 Active-High Enable Input. Connect to V L for an always-on operation.
Converter 1 Open-Drain Power-Good Output. PGOOD1 output goes low when converter 1’s output falls
below 92.5% of its set regulation voltage. Use PGOOD1 and EN2 to sequence the converters. Converter 1
starts first.
Converter 1 Internal MOSFET Drain Connection. For buck converter operation, use the MOSFET as a high-
side switch and connect DRAIN1 to the DC-DC converters supply input rail. For boost converter operation,
use the MOSFET as a low-side switch and connect DRAIN1 to the inductor and diode junction (Figure 6).
Converter 1 Internal MOSFET Source Connection. For buck operation, connect SOURCE1 to the switched
side of the inductor. For boost operation, connect SOURCE1 to PGND_ (Figure 6).
Converter 1 Bootstrap Flying-Capacitor Connection. For buck converter operation, connect BST1/VDD1 to a
0.1μF ceramic capacitor and diode according to the Typical Application Circuit . For boost converter
operation, driver bypass capacitor connection. Connect to VDRV and bypass with a 0.1μF ceramic
capacitor to PGND_ (Figure 6).
Low-Side Driver Supply Input. Connect VDRV to V L through an RC filter to bypass switching noise to the
internal V L regulator. For buck converter operation, connect anode terminals of external bootstrap diodes to
VDRV. For boost converter operation, connect VDRV to BST1/VDD1 and BST2/VDD2. Bypass with a
minimum 2.2μF ceramic capacitor to PGND_ (see the Typical Application Circuit ). Do not connect to an
external supply .
Clock Output. CKO is an output with twice the frequency of each converter (FSEL_1 = V L ) and 90° out-of-
phase with respect to converter 1. Connect CKO to the SYNC input of another MAX5098A for a four-phase
converter.
Power Ground. Connect both PGND1 and PGND2 together and to the board power ground plane.
Converter 2 Bootstrap Flying-Capacitor Connection. For buck converter operation, connect BST2/VDD2 to a
0.1μF ceramic capacitor and diode according to the Typical Application Circuit . For boost converter
operation, driver bypass capacitor connection. Connect to VDRV and bypass with a 0.1μF ceramic
capacitor from BST2/VDD2 to PGND_ (Figure 6).
Exposed Pad. Connect EP to SGND. For enhanced thermal dissipation, connect EP to a copper area as
large as possible. Do not use EP as the sole ground connection.
12
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