参数资料
型号: MAX5259EEE+T
厂商: Maxim Integrated Products
文件页数: 6/20页
文件大小: 0K
描述: IC DAC 8BIT OCTAL 3V 16-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
设置时间: 10µs
位数: 8
数据接口: 串行
转换器数目: 8
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 带卷 (TR)
输出数目和类型: 8 电压,单极
采样率(每秒): *
MAX5258/MAX5259
+3V/+5V, Low-Power, 8-Bit Octal DAC
with Rail-to-Rail Output Buffers
14
______________________________________________________________________________________
A2
A1
A0
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Don’t Care
1
0
8-Bit Data
Load All DACs with Shift-Register Data
(LDAC = X)
All eight DAC registers are updated with shift-register data. This command allows all DACs to be set to any analog
value within the reference range. This command can be used to substitute CLEAR if code 00 (hex) is programmed,
which clears all DACs. This command brings the device out of shutdown.
A2
A1
A0
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Address
1
0
1
8-Bit Data
Load Input Register, DAC Registers Unchanged (Single Update Operation)
(LDAC = X)
When performing a single update operation, A2-A0 selects the respective input register. At the rising edge of CS, the
selected input register is loaded with the current shift-register data. All DAC outputs remain unchanged. This pre-
loads individual data in the input register without changing the DAC outputs.
A2
A1
A0
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Address
1
0
8-Bit Data
Load Input and DAC Registers
(LDAC = X)
This command directly loads current shift-register data in the selected input and DAC registers at the rising edge of
CS. A2-A0 set the DAC address.
For example, to load all eight DAC registers simultaneously with individual settings, eight commands are required.
First perform seven single input register update operations (C2 = 1, C1 = 0, C0 = 1) for DACs A, B, C, D, E, F, and G
(C2 = 1, C1 = 0, C0 = 1). The final command loads input register H and updates all eight DAC registers from their
respective input registers. This command brings the device out of shutdown.
A2
A1
A0
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Address
1
8-Bit Data
Software “
LDAC” Command
(LDAC = X)
All DAC registers are updated with the contents of their respective input registers at the rising edge of CS. This is a
synchronous software command that performs the same function as the asynchronous LDAC.
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