- 您现在的位置：买卖IC网 > PDF目录8925 > MAX5306EUE+ (Maxim Integrated Products)IC DAC 12BIT OCT LP SER 16-TSSOP PDF资料下载
参数资料
| 型号： | MAX5306EUE+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/15页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT OCT LP SER 16-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 96 |
| 设置时间： | 5µs |
| 位数： | 12 |
| 数据接口： | 串行 |
| 转换器数目： | 8 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 管件 |
| 输出数目和类型： | 8 电压，单极；8 电压，双极 |
| 采样率（每秒）： | * |
| 产品目录页面： | 1397 (CN2011-ZH PDF) |
Detailed Description
The MAX5306/MAX5307 are 12-bit, eight-channel, low-
power, voltage-output digital-to-analog converters
(DACs) that are easily addressed using a simple 3-wire
serial interface. These devices feature eight double-
buffered DACs using a common 16-bit serial to parallel
shift register, a power-on reset (POR) circuit and eight
output buffer amplifiers.
Figure 1 shows the block diagram of MAX5306/
MAX5307. The shift register converts a serial 16-bit
word to parallel data for each input register operating
with a clock rate of up to 15MHz. The 3-wire digital
interface to the shift register consist of chip-select (CS),
serial clock (SCLK), and data input (DIN). Serial data at
DIN is loaded on the falling edge of SCLK.
The eight double-buffered DACs consist of input and
DAC registers. The input registers are directly connect-
ed to the shift register and hold the result of the most
recent write operation. The eight 12-bit DAC registers
hold the current output code for the respective DAC.
Data can be transferred from the input registers to the
DAC registers by either the hardware interface (LDAC)
or by software command. The output of DACs are
buffered through eight Rail-to-Rail op amps.
The MAX5306 has a digital output (DOUT) which can
be used to daisy chain multiple devices on a single ser-
ial bus. The MAX5307 contains a hardware shutdown
(CLR) to clear all internal registers and power-down all
DACs.
The MAX5306/MAX5307 require an external reference
such as the MAX6161 family. The reference voltage
range is from 0.8V to VDD.
POR circuitry gives the DACs a defined state during
startup. At power-on, the DAC outputs reset to zero
through a 100k
Ω resistor, providing additional safety for
applications that drive valves or other transducers that
need to be off at power-up.
The MAX5306/MAX5307 feature low digital feedthrough
and minimize glitch energy on MSB transitions. The 3-
wire SPI, QSPI, MICROWIRE and DSP-compatible seri-
al interface saves additional circuit board space .
Serial Interface
Configuration
The MAX5306/MAX5307 3-wire serial interface are
compatible with MICROWIRE, SPI, QSPI, and DSPs
(Figure 2 and Figure 3). The chip-select input (CS)
frames the serial data loading at DIN. Following CS’s
high-to-low transition, the data is shifted synchronously
and latched into the input register on each falling edge
of the serial clock input (SCLK). Each serial word is 16
bits, the first four bits are the control word followed by
12 data bits (MSB first) as shown in Table 1. The 12-bit
DAC code is unipolar binary with 1LSB = VREF/4096.
The serial input register transfers its contents to the
input registers after loading 16 bits of data and driving
CS high. CS must be brought high for a minimum of
20ns before the next write sequence since a write
MAX5306/MAX5307
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
_______________________________________________________________________________________
7
Pin Description
PIN
NAME
FUNCTION
1
SCLK
Serial Clock Input. Serial data is loaded on the falling edge of SCLK.
2
DIN
Serial Data Input
3
LDAC
Load DAC. LDAC is an asynchronous active-low input that updates the DAC outputs
simultaneously. If LDAC is driven low, the DAC registers are transparent.
4
REF
Reference Voltage Input
5–12
OUT_
Analog Output Signal
13
GND
Ground
14
VDD
Power Supply. Bypass VDD to GND with a 0.1F capacitor.
DOUT
Data Output (MAX5306). DOUT is updated on the falling edge of SCLK.
15
CLR
Asynchronous Clear DAC (MAX5307). Active-low input to clear all DACs and registers. Resets all
outputs to zero.
16
CS
Chip-Select Input (active-low)
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
相关PDF资料 |
PDF描述 |
|---|---|
| DS1091LUB-027/V+T | IC CLK GEN 27MHZ AUTO 8UMAX |
| DS1091LUB-025/V+T | IC CLK GEN 25MHZ AUTO 8UMAX |
| DS1091LUB-019/V+T | IC CLK GEN 19.9MHZ AUTO 8UMAX |
| DS1091LUB-016/V+T | IC CLK GEN 16.6MHZ AUTO 8UMAX |
| MAX9375EUA+ | IC TRANSLATOR SGL 8-UMAX |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX5306EUE+ | 功能描述:数模转换器- DAC 12-Bit 8Ch Precision DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| MAX5306EUE+T | 功能描述:数模转换器- DAC 12-Bit 8Ch Precision DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| MAX5306EUE-T | 功能描述:数模转换器- DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| MAX5307EUE | 功能描述:数模转换器- DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| MAX5307EUE+ | 功能描述:数模转换器- DAC 12-Bit 8Ch Precision DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
发布紧急采购，3分钟左右您将得到回复。