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参数资料
| 型号： | MAX5852ETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/18页 |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT DUAL 165MSPS 40-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 设置时间： | 12ns |
| 位数： | 8 |
| 数据接口： | 并联 |
| 转换器数目： | 2 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 4 电流，单极 |
| 采样率（每秒）： | 200M |
MAX5852
Dual, 8-Bit, 165Msps, Current-Output DAC
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = CVDD = 3V, AGND = DGND = CGND = 0, fDAC = 165Msps, differential clock, external reference, VREF = 1.2V,
IFS = 20mA, output amplitude = 0dB FS, differential output, TA = TMIN to TMAX, unless otherwise noted. TA ≥ +25°C guaranteed by
production test. TA < +25°C guaranteed by design and characterization. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Internal-Reference Supply
Rejection
AVDD varied from 2.7V to 3.6V
0.5
mV/V
Internal-Reference Output-
Voltage Temperature Drift
TCVREFO
REN = 0
±50
ppm/°C
Internal-Reference Output Drive
Capability
REN = 0
50
A
External-Reference Input Voltage
Range
REN = 1
0.10
1.2
1.32
V
Current Gain
IFS/IREF
32
mA/mA
LOGIC INPUTS (DA7–DA0, DB7–DB0, CW)
Digital Input-Voltage High
VIH
0.65 x
DVDD
V
Digital Input-Voltage Low
VIL
0.3 x
DVDD
V
Digital Input Current
IIN
-1
+1
A
Digital Input Capacitance
CIN
3pF
SINGLE-ENDED CLOCK INPUT/OUTPUT AND DCE INPUT (CLK, DCE)
Digital Input-Voltage High
VIH
DCE = 1
0.65 x
CVDD
V
Digital Input-Voltage Low
VIL
DCE = 1
0.3 x
CVDD
V
Digital Input Current
IIN
DCE = 1
-1
+1
A
Digital Input Capacitance
CIN
DCE = 1
3
pF
Digital Output-Voltage High
VOH
DCE = 0, ISOURCE = 0.5mA, Figure 1
0.9 x
CVDD
V
Digital Output-Voltage Low
VOL
DCE = 0, ISINK = 0.5mA, Figure 1
0.1 x
CVDD
V
DIFFERENTIAL CLOCK INPUTS (CLKXP/CLKXN)
Differential Clock Input Internal
Bias
CVDD/2
V
Differential Clock Input Swing
0.5
V
Clock Input Impedance
Measured single ended
5
k
POWER REQUIREMENTS
Analog Power-Supply Voltage
AVDD
2.7
3
3.6
V
Digital Power-Supply Voltage
DVDD
2.7
3
3.6
V
Clock Power-Supply Voltage
CVDD
2.7
3
3.6
V
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