参数资料
型号: MAX6446UK23L+T
厂商: Maxim Integrated Products
文件页数: 5/13页
文件大小: 0K
描述: IC MPU RESET 2.313V SOT23-5
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 2.313V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SC-74A,SOT-753
供应商设备封装: SOT-23-5
包装: 标准包装
其它名称: MAX6446UK23L+TDKR
μP Reset Circuits with Long Manual Reset
Setup Period
Pin Description
PIN
MAX6443
MAX6444
1
MAX6445
MAX6446
2
MAX6447
MAX6448
2
MAX6449
MAX6450
2
MAX6451
MAX6452
2
NAME
GND
Ground
FUNCTION
Active-Low Push-Pull or Open-Drain Output. RESET
changes from high to low when V CC or RSTIN drops below
its selected reset threshold and remains low for the 210ms
reset timeout period after all monitored power-supply inputs
2
1
1
1
1
RESET
exceed their selected reset thresholds. RESET is one-shot
pulsed low for the reset timeout period (140ms min) after
selected manual reset inputs are asserted longer than the
specified setup period. For the open-drain output, use a
minimum 20k ? pullup resistor to V CC .
Manual Reset Input, Active Low. Internal 50k ? pullup to
3
3
3
V CC. Pull MR1 low for the typical input pulse width (t MR )
to one-shot pulse RESET for the reset timeout period.
MR1
Manual Reset Input, Active Low. Pull both MR1 and
3
3
MR2 low for the typical input pulse width (t MR ) to one-
shot pulse RESET for the reset timeout period.
4
4
4
4
4
V CC
V CC Voltage Input. Power supply and input for the
primary microprocessor voltage reset monitor.
Manual Reset Input, Active Low. Internal 50k ? pullup to
5
6
MR2
V CC . Pull both MR1 and MR2 low for the typical input
pulse width (t MR ) to one-shot pulse RESET for the reset
timeout period.
5
6
MR2
Manual Reset Input. Pull the MR2 high to immediately
one-shot pulse RESET for the reset timeout period.
Reset Input. High-impedance input to the adjustable
5
5
RSTIN
reset comparator. Connect RSTIN to the center point of
an external resistor-divider to set the threshold of the
externally monitored voltage.
Detailed Description
Reset Output
The reset output is typically connected to the reset
input of a microprocessor (μP). A μP’s reset input starts
or restarts the μP in a known state. The MAX6443 –
MAX6452 μP supervisory circuits provide the reset
logic to prevent code-execution errors during power-
up, power-down and brownout conditions (see the
Typical Operating Circuit).
RESET changes from high to low whenever the moni-
tored voltages (RSTIN or V CC ) drop below the reset
threshold voltages. Once V RSTIN and V CC exceed their
respective reset threshold voltages, RESET remains low
for the reset timeout period and then goes high. RESET
is one-shot pulsed whenever selected manual reset
inputs are asserted. RESET stays asserted for the nor-
mal reset timeout period (140ms min).
RESET is guaranteed to be in the proper output logic
state for V CC inputs ≥ 1V. For applications requiring valid
reset logic when V CC is less than 1V, see the Ensuring a
Valid RESET Output Down to V CC = 0V section.
_______________________________________________________________________________________
5
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