参数资料
型号: MAX6850AEE-T
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 显示驱动器
英文描述: 4-Wire Interfaced, 7-, 14-, and 16-Segment Alphanumeric Vacuum-Fluorescent Display Controller
中文描述: VACUUM FLUOR DISPLAY DRIVER, PDSO16
封装: 0.150 INCH, 0.25 MM PITCH, MO-137, QSOP-16
文件页数: 27/34页
文件大小: 485K
代理商: MAX6850AEE-T
The allowed range of fOSC is 2MHz to 8MHz. If fOSC is
set too high, the internal oscillator can stop working. An
internal fail-safe circuit monitors the multiplex clock and
detects a slow or nonworking multiplex clock. When a
slow or nonworking multiplex clock is detected, an
internal fail-safe oscillator generates a replacement
clock of about 200kHz. This backup clock ensures that
the VFD is not damaged by the multiplex operation halt-
ing inadvertently. The scan rate for 16 digits is about
15Hz in fail-safe mode, and flickers. A flickering display
is a good indication that there is a problem with the
multiplex clock.
Power Supplies
The MAX6850 operates from a single 2.7V to 3.6V
power supply. Bypass the power supply to GND with a
0.1F capacitor as close to the device as possible. Add
a bulk capacitor (such as a low-cost electrolytic 1F to
22F) if the MAX6850 is driving high current from any of
the general-purpose output ports.
Chip Information
TRANSISTOR COUNT: 129,898
PROCESS: CMOS
MAX6850
4-Wire Interfaced, 7-, 14-, and 16-Segment Alpha-
numeric Vacuum-Fluorescent Display Controller
______________________________________________________________________________________
33
Functional Diagram
OSC1
OSC2
VFBLANK
CLK
CS
DIN
DOUT
4-WIRE SERIAL INTERFACE
RAM
CONFIGURATION
REGISTERS
CHARACTER-
GENERATOR
ROM
OUTPUT
MAP
RAM
USER
OUTPUTS
FILAMENT
PWM
CLOCK
GENERATOR
PWM
BRIGHTNESS
CONTROL
VFCLK
VFDOUT
VFLOAD
PHASE 2
PHASE 1
PUMP
PORT 0
PORT 1
OUTPUT
SHIFTER
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VFCLK
OSC2
OSC1
PORT1
DIN
SCLK
PORT0
GND
TOP VIEW
MAX6850
VFDOUT
VFLOAD
PHASE1
VFBLANK
PUMP
PHASE2
V+
CS
QSOP
Pin Configuration
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