参数资料
型号: MAX6952EAX+
厂商: Maxim Integrated
文件页数: 6/21页
文件大小: 0K
描述: IC DRVR DSPL LED 36-SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 30
显示器类型: LED
配置: 5 x 7(矩阵)
接口: 4 线串行
数字或字符: 4 位数字
电流 - 电源: 12mA
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 36-BSOP(0.295",7.50mm 宽)
供应商设备封装: 36-SSOP
包装: 管件
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5 ? 7 Matrix LED Display Driver
Table 1. Connection Scheme for Four Monocolor Digits
DIGIT O0 O1 O2 O3
O4 O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O19 O20 O21 O22 O23
1
2
Digit 0 rows (cathodes) R1 to R7
Digit 1 rows (cathodes) R1 to R7
Digit 2 rows (cathodes) R1 to R7
Digit 3 rows (cathodes) R1 to R7
Digit 0 columns (anodes)
C1 to C5
Digit 2 columns (anodes)
C1 to C5
Digit 1 columns
(anodes) C6 to C10
Digit 3 columns
(anodes) C6 to C10
Table 2. Connection Scheme for Two Bicolor Digits
DIGIT O0 O1 O2 O3 O4
O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O19 O20 O21 O22 O23
1
2
Digit 0 rows (cathodes) R1 to R14
Digit 1 rows (cathodes) R1 to R14
Digit 0 columns (anodes) C1 to C10
- the 5 green anodes - - the 5 red anodes -
Digit 1 columns (anodes) C1 to C10
- the 5 green anodes - - the 5 red anodes -
Table 3. Serial-Data Format (16 Bits)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
R/ W
ADDRESS
MSB
DATA
LSB
CLK and DIN may be used to transmit data to other
peripherals. The MAX6952 ignores all activity on CLK
ISET
OSC
CURRENT
SOURCE
DIVIDER/
COUNTER
PWM
BRIGHTNESS
CONTROL
ROW
MULTIPLEXER
LED
DRIVERS
O0 TO O23
and DIN except when CS is low.
Control and Operation Using the 4-Wire Interface
Controlling the MAX6952 requires sending a 16-bit
word. The first byte, D15 through D8, is the command
NETWORK
CHARACTER
CHARACTER
byte (Table 3), and the second byte, D7 through D0, is
the data byte.
GENERATOR
RAM
GENERATOR
ROM
Connecting Multiple MAX6952s to the 4-Wire Bus
Multiple MAX6952s may be daisy-chained by connect-
ing the DOUT of one device to the DIN of the next, and
BLINK
BLINK
SPEED
SELECT
RAM
CONFIGURATION
REGISTERS
MAX6952
driving CLK and CS lines in parallel (Figure 6). Data at
DIN propagates through the internal shift registers and
appears at DOUT 15.5 clock cycles later, clocked out
on the falling edge of CLK. When sending commands
to daisy-chained MAX6952s, all devices are accessed
at the same time. An access requires (16 x n) clock
cycles, where n is the number of MAX6952s connected
together. To update just one device in a daisy-chain,
the user can send the no-op command (0x00) to the
CLK
CS
DIN
DOUT
SERIAL INTERFACE
others.
Writing Device Registers
The MAX6952 contains a 16-bit shift register into which
Figure 1. Functional Diagram
DIN data are clocked on the rising edge of SCLK, when
CS is low. When CS is high, transitions on SCLK have
no effect. When CS goes high, the 16 bits in the shift
6
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