参数资料
型号: MAX6955ATL+T
厂商: Maxim Integrated
文件页数: 4/43页
文件大小: 0K
描述: IC DRVR DSPL LED 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
显示器类型: LED
配置: 7、14、16 段
接口: I²C
电流 - 电源: 22mA
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(6x6)
包装: 带卷 (TR)
MAX6955
2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
TIMING CHARACTERISTICS
(Typical Operating Circuit, V+ = 2.7V to 5.5V, T A = T MIN to T MAX , unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS
Serial Clock Frequency
Bus Free Time Between a STOP
and a START Condition
Hold Time (Repeated) START
Condition
Repeated START Condition Setup
Time
STOP Condition Setup Time
f SCL
t BUF
t HD, t STA
t SU , t STA
t SU:STO
1.3
0.6
0.6
0.6
400
kHz
μs
μs
μs
μs
Data Hold Time
Data Setup Time
SCL Clock Low Period
SCL Clock High Period
t HD , t DAT
t SU , t DAT
t LOW
t HIGH
(Note 3)
100
1.3
0.6
0.9
μs
ns
μs
μs
Rise Time of Both SDA and SCL
Signals, Receiving
Fall Time of Both SDA and SCL
Signals, Receiving
Fall Time of SDA Transmitting
Pulse Width of Spike Suppressed
Capacitive Load for Each
Bus Line
t R
t F
t F , t X
t SP
C B
(Notes 2, 4)
(Notes 2, 4)
(Notes 2, 5)
(Notes 2, 6)
(Note 2)
0
20 +
0.1C B
20 +
0.1C B
20 +
0.1C B
400
300
300
300
50
ns
ns
ns
ns
pF
Note 1: All parameters tested at T A = +25°C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design.
Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V IL - of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 4: C B = total capacitance of one bus line in pF. t R and t F measured between 0.3V+ and 0.7V+.
Note 5: I SINK ≤ 6mA. C B = total capacitance of one bus line in pF. t R and t F measured between 0.3V+ and 0.7V+.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
4
Maxim Integrated
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