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参数资料
| 型号： | MAX6959BAPE+ |
| 厂商： | Maxim Integrated |
| 文件页数： | 3/19页 |
| 文件大小： | 0K |
| 描述： | IC DRVR DSPL LED 16-DIP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 25 |
| 显示器类型： | LED |
| 配置： | 7 段 + 2 个信号器 |
| 接口： | SMBus（2 线/I²C） |
| 数字或字符： | 4 位数字 |
| 电流 - 电源： | 5.9mA |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 16-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 16-PDIP |
| 包装： | 管件 |
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
DC ELECTRICAL CHARACTERISTICS (continued)
(V+ = 3V to 5.5V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V+ = 5V, T A = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Pullup to V+ INPUT1, INPUT2
I PULLUP
26.5
μA
IRQ/SEG9, SDA Output Low
Voltage
SDA Output Low Voltage
V OLBK
V OL(SDA)
I SINK = 6mA, T A = -40 ° C to +85 ° C
I SINK = 4mA, T A = T MIN to T MAX
I SINK = 6mA
0.4
0.4
0.4
V
V
TIMING CHARACTERISTICS
(V+ = 3V to 5.5V, T A = T MIN to T MAX , Figure 1, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Serial Clock Frequency
Bus Free Time Between a STOP
and a START Condition
Hold Time (Repeated) START
Condition
Repeated START Setup Time
STOP Condition Setup Time
f SCL
t BUF
t HD, STA
t SU, STA
t SU, STO
1.3
0.6
0.6
0.6
400
kHz
μs
μs
μs
μs
Data Hold Time
Data Setup Time
SCL Clock Low Period
SCL Clock High Period
t HD, DAT
t SU, DAT
t LOW
t HIGH
(Note 3)
100
1.3
0.6
0.9
μs
ns
μs
μs
Rise Time of Both SDA and SCL
Signals, Receiving
Fall Time of Both SDA and SCL
Signals, Receiving
Fall Time of SDA Transmitting
Pulse Width of Spike Suppressed
Capacitive Load for Each Bus
Line
t R
t F
t F
t SP
C B
(Notes 2, 4)
(Notes 2, 4)
(Notes 2, 5)
(Note 6)
20 +
0.1C B
20 +
0.1C B
20 +
0.1C B
50
400
300
300
250
ns
ns
ns
ns
pF
Note 1: All parameters tested at T A =+25°C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design.
Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V IL of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 4: C B = total capacitance of one bus line in pF. t R and t F measured between 0.3V+ and 0.7V+.
Note 5: I SINK ≤ 6mA. C B = total capacitance of one bus line in pF. t R and t F measured between 0.3V+ and 0.7V+.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
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| MAX695C/D DIE | 制造商:Maxim Integrated Products 功能描述: |
| MAX695CPE | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
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