参数资料
型号: MAX6965ATE+
厂商: Maxim Integrated
文件页数: 8/22页
文件大小: 0K
描述: IC LED DRIVER LINEAR 16-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 100
拓扑: 开路漏极,PWM
输出数: 9
内部驱动器:
类型 - 主要: 背光,LED 闪烁器
类型 - 次要: RGB,白色 LED
频率: 400kHz
电源电压: 2 V ~ 3.6 V
输出电压: 7V
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
供应商设备封装: 16-TQFN(3x3)
包装: 管件
工作温度: -40°C ~ 125°C
9-Output LED Driver with Intensity Control
and Hot-Insertion Protection
Table 1. MAX6965 I 2 C Slave Address Map
PIN AD0
SCL
SDA
GND
V+
A6
1
1
0
0
A5
1
1
1
1
A4
0
0
0
0
DEVICE ADDRESS
A3
0
0
0
0
A2
0
1
0
1
A1
0
0
0
0
A0
0
0
0
0
Table 2. Register Address Map
REGISTER
Blink phase 0 outputs
User RAM
Blink phase 1 outputs
Master, O8 intensity
Configuration
Outputs intensity O1, O0
Outputs intensity O3, O2
Outputs intensity O5, O4
Outputs intensity O7, O6
ADDRESS CODE
(hex)
0x01
0x03
0x09
0x0E
0x0F
0x10
0x11
0x12
0x13
AUTOINCREMENT
ADDRESS
0x01 (no change)
0x03 (no change)
0x09 (no change)
0x0E (no change)
0x0F (no change)
0x11
0x12
0x13
0x10
during the high period of the clock pulse. When the
master is transmitting to the MAX6965, the device gen-
erates the acknowledge bit because the MAX6965 is
the recipient. When the MAX6965 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.
Slave Address
The MAX6965 has a 7-bit long slave address (Figure 6).
The eighth bit following the 7-bit slave address is the
R/ W bit. The R/ W bit is low for a write command, high
for a read command.
The second (A5), third (A4), fourth (A3), sixth (A1), and
last (A0) bits of the MAX6965 slave address are always
1, 0, 0, 0, and 0. Slave address bits A6 and A2 are
selected by the address input AD0. AD0 can be con-
nected to GND, V+, SDA, or SCL. The MAX6965 has
four possible slave addresses (Table 1), and therefore
a maximum of four MAX6965 devices can be controlled
independently from the same interface.
Message Format for Writing the MAX6965
A write to the MAX6965 comprises the transmission of
the MAX6965’s slave address with the R/ W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The command
byte determines which register of the MAX6965 is to be
written to by the next byte, if received (Table 2). If a
STOP condition is detected after the command byte is
received, then the MAX6965 takes no further action
beyond storing the command byte.
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register of
the MAX6965 selected by the command byte (Figure 8).
If multiple data bytes are transmitted before a STOP con-
dition is detected, these bytes are generally stored in
subsequent MAX6965 internal registers because the
command byte address autoincrements (Table 2). A
diagram of a write to the output ports registers (blink
phase 0 register or blink phase 1 register) is given in
Figure 10.
8
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