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参数资料
| 型号： | MAX7060ATG/V+ |
| 厂商： | Maxim Integrated |
| 文件页数： | 18/31页 |
| 文件大小： | 0K |
| 描述： | TRANSMITTER 300-450MHZ 24TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 75 |
| 频率： | 280MHz ~ 450MHz |
| 应用： | 住宅/楼宇自动化，工业控制 |
| 调制或协议： | ASK，FSK |
| 数据传输率 - 最大： | 140kbps |
| 功率 - 输出： | 14.5dBm |
| 电流 - 传输： | 34mA |
| 数据接口： | PCB，表面贴装 |
| 天线连接器： | PCB，表面贴装 |
| 电源电压： | 2.1 V ~ 3.6 V，4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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MAX7060
280MHz to 450MHz Programmable
ASK/FSK Transmitter
? f RF ? decimal value to program the
? ? 16 ? × 4096 =
f XTAL
? ?
Applications Information
SPI Mode Settings
ASK Carrier Frequency
When the MAX7060 is in ASK mode, only the carrier
frequency needs to be set. To do this, the user calcu-
lates the divide ratio based on the carrier frequency and
crystal frequency. The example below shows how to
determine the correct value to be loaded into the carrier-
frequency registers (fce[15:0]).
Due to the nature of the transmit PLL frequency divider,
a fixed offset of 16 must be subtracted from the trans-
mit PLL divider ratio for programming the MAX7060’s
transmit-frequency registers. To determine the value to
program the MAX7060’s transmit-frequency registers,
convert the decimal value of the following equation to the
nearest hexadecimal value:
transmit-frequency registers
Assume the ASK transmit frequency = 315MHz and
f XTAL = 16MHz. In this example, the rounded decimal
value is 15,104 or 0x3B00. The upper byte (0x3B) is
loaded into the FCenter0 register (fce[15:8]) and the
lower byte (0x00) is loaded into the FCenter1 register
(fce[7:0]).
FSK Mark and Space Frequencies
When the MAX7060 is in FSK mode, two frequencies
need to be set: the mark (logical 1) frequency and the
space (logical 0) frequency. In most cases, the two fre-
quencies are above and below the carrier frequency by
the deviation frequency. Therefore, the user needs to
calculate the divide ratio for both frequencies and load
them into four registers. The procedure for calculating
the register settings is the same as it is for calculating
the carrier frequency. The example below shows how to
determine the register settings for the mark and space
frequencies when the frequency deviation is ±50kHz
(100kHz between mark and space).
Assume that, for an FSK transmitter centered at
433.92MHz, the mark frequency is 433.97MHz, the
space frequency is 433.87MHz, and the crystal fre-
quency is 16MHz. In this example, the rounded decimal
value for the mark frequency is 45,560 or 0xB1F8. For the
space frequency, the rounded decimal value is 45,535
or 0xB1DE. The mark setting is loaded into the FHigh0
and FHigh1 registers (fhi[15:0]), and the space setting
is loaded into the FLow0 and FLow1 registers (flo[15:0]).
18
Transmit Power Settings (5V Supply)
The output power level is set by entering a 5-bit value
into the PApwr register (papwr[4:0]). The highest setting
(30dec or 0x1E) corresponds to the highest transmit-
ted power level. Each step is slightly less than 1dB
(approximately 0.95dB), with the lowest setting produc-
ing a transmitted power 28dB lower than the highest.
The highest transmitted power depends on the load
presented to the PA output. A 50 I or 60 I load produces
an output power level of +14dBm to +15dBm when the
highest papwr[4:0] setting (0x1E) is applied. Increasing
the load resistance reduces the output power level.
Reducing the setting by one step reduces the power by
approximately 1dB, and the minimum transmitted power
is still about 28dB below the maximum. For example, if
the load resistance is increased to the point where the
output power for the maximum setting (0x1E) is +10dBm,
then the minimum setting (0x00) produces an output
power of about -18dBm.
Transmit Power Settings (3V Supply)
The output power level in 3V operation is set the same
way as in 5V operation, but the variation in the 3V sup-
ply (the specified range is 2.1V to 3.6V) affects the
maximum power that can be transmitted. If the supply
is 3.6V, then the maximum papwr[4:0] setting (0x1E)
still produces a +14dBm to +15dBm transmitted power
level. As the supply voltage decreases, the transmitted
power at the highest settings is compressed, so that
the top setting and an increasing number of the lower
settings produce the same transmitted power, which
is lower than the +14dBm to +15dBm achieved with a
3.6V supply. For example, a 2.7V supply produces a
maximum transmitter power of +12dBm to +13dBm, and
the PApwr register settings from 0x1B to 0x1E (27dec to
30dec) produce the same transmitter power. Below this
compressed range, the power settings give the same
power levels that they would give with a 5V supply. At
the lowest supply level of 2.1V, the maximum setting
produces a maximum transmitter power of +10dBm, and
the PApwr register settings from 0x19 to 0x1E (25dec to
30dec) produce the same transmitter power. The effect
of a lower supply voltage reduces the maximum power
and the adjustment range. The power at the lowest set-
ting remains unchanged.
The transmitted power using a 3V supply can be set
higher than the levels described in the paragraph above
by connecting PAOUT directly to PAVDD and discon-
necting (leave open) the PAVOUT pin. The tradeoff of this
connection is that there is no transmit power adjustment.
Maxim Integrated
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