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参数资料
| 型号： | MAX7302AEE+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 22/30页 |
| 文件大小： | 0K |
| 描述： | IC LED DRIVER LINEAR 16-QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 拓扑： | 开路漏极，PWM |
| 输出数： | 9 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 背光，LED 闪烁器 |
| 类型 - 次要： | 白色 LED |
| 频率： | 1MHz |
| 电源电压： | 1.62 V ~ 3.6 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 带卷 (TR) |
| 工作温度： | -40°C ~ 125°C |
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SMBus/I 2 C Interfaced 9-Port,
Level-Translating GPIO and LED Driver with CLA
Serial Interface
Serial Addressing
The MAX7302 operates as a slave that sends and
receives data through an I 2 C-compatible, 2-wire inter-
face. The interface uses a serial-data line (SDA) and a
serial-clock line (SCL) to achieve bidirectional commu-
nication between master(s) and slave(s). A master (typ-
ically a microcontroller) initiates all data transfers to and
from the MAX7302 and generates the SCL clock that
synchronizes the data transfer (see Figure 10).
The MAX7302 SDA line operates as both an input and
an open-drain output. A 4.7k Ω (typ) pullup resistor is
required on SDA. The MAX7302 SCL line operates only
as an input. A 4.7k Ω (typ) pullup resistor is required on
SCL if there are multiple masters on the 2-wire inter-
face, or if the master in a single-master system has an
open-drain SCL output.
Each transmission consists of a START condition (see
Figure 11) sent by a master, followed by the MAX7302
7-bit slave address plus R/ W bit, a register address byte,
one or more data bytes, and finally a STOP condition
(see Figure 11).
START and STOP Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (see Figure 11).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(see Figure 12).
SDA
t LOW
t SU,DAT
t HD,DAT
t SU,STA
t HD,STA
t SU,STO
t BUF
SCL
t HD,STA
t R
t HIGH
t F
START CONDITION
REPEATED START CONDITION
STOP
CONDITION
START
CONDITION
RESET
t WL(RST)
Figure 10. 2-Wire Serial Interface Timing Details
SDA
SDA
SCL
S
START
P
STOP
SCL
CONDITION
Figure 11. START and STOP Conditions
CONDITION
DATA LINE STABLE; CHANGE OF DATA
DATA VALID
ALLOWED
Figure 12. Bit Transfer
22
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX7302ATE | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:SMBus/I2C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA |
| MAX7302ATE/GH9 | 制造商:Maxim Integrated Products 功能描述:LEVEL-TRANSLATING GPIO AND LED DRIVER WITH CLA - Rail/Tube |
| MAX7302ATE+ | 功能描述:外围驱动器与原件 - PCI 9-Port Level-Trans GPIO & LED Driver RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| MAX7302ATE+T | 功能描述:外围驱动器与原件 - PCI 9-Port Level-Trans GPIO & LED Driver RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| MAX7302EVKIT+ | 制造商:Maxim Integrated Products 功能描述:MAX7302 EVAL KIT - Boxed Product (Development Kits) |
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