参数资料
型号: MAX742CWP+T
厂商: Maxim Integrated Products
文件页数: 6/12页
文件大小: 0K
描述: IC REG CTRLR BST INV PWM 20-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1,000
PWM 型: 电流模式
输出数: 2
频率 - 最大: 200kHz
占空比: 90%
电源电压: 4.2 V ~ 10 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
Switch-Mode Regulator with
+5V to ±12V or ±15V Dual Output
______________________________________________________________Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
NAME
FB+
CC+
AGND
AV+
100/200
12/15
VREF
SS
CC-
FB-
CSL-
CSH-
V+
EXT-
PDRV
PUMP
EXT+
GND
CSL+
CSH+
FUNCTION
Step-Up Feedback Input
Step-Up Compensation Capacitor
Analog Ground
Analog Supply Voltage Input (+5V)
Selects oscillator frequency. Ground for 200kHz, or tie to V+ for 100kHz.
Selects V OUT . Ground for ±15V, or tie to V+ for ±12V.
Reference Voltage Output (+2.00V). Force to GND or V+ to disable chip.
Soft-Start Timing Capacitor (sources 5μA)
Inverting Compensation Capacitor
Inverting Section Feedback Input
Current-Sense Low (inverting section)
Current-Sense High (inverting section)
Supply Voltage Input (+5V)
Push-Pull Output —drives external P-channel MOSFET.
Voltage Input —negative supply for P-channel MOSFET driver.
Charge-Pump Driver —clock output at 1/2 oscillator frequency.
Push-Pull Output —drives external logic-level N-channel MOSFET.
High-Current Ground
Current-Sense Low (step-up section)
Current-Sense High (step-up section)
________________Operating Principle
Each current-mode controller consists of a summing
amplifier that adds three signals: the current waveform
from the power switch FET, an output-voltage error sig-
nal, and a ramp signal for AC compensation generated
by the oscillator. The output of the summing amplifier
resets a flip-flop, which in turn activates the power FET
driver stage (Figure 1).
Both external transistor switches are synchronized to
the oscillator and turn on simultaneously when the flip-
flop is set. The switches turn off individually when their
source currents reach a trip threshold determined by
the output-voltage error signal. This creates a duty-
cycle modulated pulse train at the oscillator frequency,
where the on time is proportional to both the output-
voltage error signal and the peak inductor current. Low
peak currents or high output-voltage error signals result
in a high duty cycle (up to 90% maximum).
AC stability is enhanced by the internal ramp signal
applied to the error amplifier. This scheme eliminates
regenerative “staircasing” of the inductor current, which
is otherwise a problem when in continuous current
mode with greater than 50% duty cycle.
6
_______________________________________________________________________________________
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