参数资料
型号: MAX8505EEE+T
厂商: Maxim Integrated Products
文件页数: 10/15页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 3A 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 4.68 V
输入电压: 2.6 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 500kHz,1MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 16-QSOP
3A, 1MHz, 1% Accurate, Internal Switch
Step-Down Regulator with Power-OK
Current Limit
The MAX8505 offers both high-side and low-side
current limits. The high-side current limit monitors the
inductor peak current and the low-side current limit
monitors the inductor valley current. Current-limit thresh-
Soft-Start
To reduce input transient currents during startup, a pro-
grammable soft-start is provided. The soft-start time is
given by:
olds are 6A (typ) for high side and 3.8A (typ) for low
side. If the output inductor current exceeds the high-
side current limit during its on-time, the high-side MOS-
t SOFT _ START = C REF ×
0 . 8 V
25 μ A
FET turns off and the synchronous rectifier turns on. The
inductor current is continuously monitored during the
on-time of the low-side MOSFET. If the inductor current
is still above the low-side current limit at the moment of
the next clock cycle, the high-side MOSFET is not
turned on and the low-side MOSFET is kept on to contin-
ue discharging the output inductor current. Once the
inductor current is below the low-side current limit, the
high-side MOSFET is turned on at the next clock cycle.
If the inductor current stays less than the high-side cur-
rent limit during the minimum on duty ratio, the normal
operation resumes at the next clock cycle. Otherwise,
the current-limit operation continues.
V CC Decoupling
Due to the high switching frequency and tight output
tolerance (1%), decouple V CC from IN with a 10 ?
resistor and bypass to GND with a 0.1μF capacitor.
Place the capacitor as close to V CC as possible.
Bootstrap (BST)
Gate-drive voltage for the high-side N-channel switch is
generated by a bootstrapped capacitor boost circuit.
The bootstrapped capacitor is connected between the
BST pin and LX. When the low-side N-channel MOSFET
is on, it forces LX to ground and charges the capacitor
to V IN through diode D1. When the low-side N-channel
MOSFET turns off and the high-side N-channel MOSFET
turns on, LX is pulled to V IN . D1 prevents the capacitor
from discharging into V IN and the voltage on the boot-
strapped capacitor is boosted above V IN . This provides
the necessary voltage for the high driver. A Schottky
diode should be used for D1.
Frequency Selection/Enable (CTL)
The MAX8505 includes a frequency selection circuit to
A minimum capacitance of 0.01μF at REF is recom-
mended to reduce the susceptibility to switching noise.
Power-OK (POK)
The MAX8505 also includes an open-drain POK output
that indicates when the regulator output is within ±12%
of its nominal output. If the output voltage moves
outside this range, the POK output is pulled to ground.
Since this comparator has no hysteresis on either
threshold, a 50μs delay time is added to prevent the
POK output from chattering between states. The POK
should be pulled to V IN or another supply voltage less
than 5.5V through a resistor.
UVLO
If V CC drops below +2.25V, the UVLO circuit inhibits
switching. Once V CC rises above +2.35V, the UVLO
clears, and the soft-start sequence activates.
Thermal Protection
Thermal-overload protection limits total power dissipa-
tion in the device. When the junction temperature
exceeds T J = +170°C, a thermal sensor forces the
device into shutdown, allowing the die to cool. The ther-
mal sensor turns the device on again after the junction
temperature cools by 20°C, resulting in a pulsed output
during continuous overload conditions. Following a
thermal-shutdown condition, the soft-start sequence
begins anew.
Design Procedure
Duty Cycle
The equation below shows how to calculate the result-
ing duty cycle when series losses from the inductor and
internal switches are accounted for:
= OUT OUT NLS L
allow  it  to  run  at  500kHz  or  1MHz.  The  operating  fre-
quency is selected through a control input, CTL, which
has three input threshold ranges that are ratiometric to
D =
V OUT + I OUT ( R NLS + R L )
V IN + I OUT ( R NLS ? R NHS )
V + I ( R + R )
V IN
the input supply voltage. When CTL is driven to GND, it
acts like an enable pin, switching the output off. When
the CTL input is driven to >0.8   V CC , the MAX8505 is
enabled with 1MHz switching. When the CTL input is
between 0.55   V CC and 0.7   V CC , the part operates
at 500kHz. When the CTL input is <0.45 x V CC , the
device is in shutdown.
if R NLS = R NHS
where V OUT = output voltage; V IN = input voltage;
I OUT = output current (3A maximum); R L = ESR of the
inductor; R NHS = on-resistance of the high-side switch;
and R NLS = on-resistance of the low-side switch.
10
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