参数资料
型号: MAX8505EEE+T
厂商: Maxim Integrated Products
文件页数: 5/15页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 3A 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 4.68 V
输入电压: 2.6 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 500kHz,1MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 16-QSOP
3A, 1MHz, 1% Accurate, Internal Switch
Step-Down Regulator with Power-OK
ELECTRICAL CHARACTERISTICS (continued)
(V IN = V CC = V CTL = +3.3V, V FB = 0.8V, V COMP = 1.25V, C REF = 0.01μF, T A = -40°C to +85°C , unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LX Maximum Duty Cycle
LX Minimum Duty Cycle
V IN = V CC = 2.6V, 3.3V,
5.5V
V IN = V CC = 2.6V, 3.3V,
5.5V
500kHz
1MHz
500kHz
1MHz
90
84
8
15
%
%
SLOPE COMPENSATION
Slope Compensation
Extrapolated to 100% duty cycle
245
406
mV
BST
V LX = 5.5V
10
BST Shutdown Supply Current
(V BST - V LX ) = V IN =
V CC = 5.5V, V CTL = 0V
V LX = 0V
LX open
10
10
μA
CTL
For 1MHz
80
CTL Input Threshold
V IN = V CC = 2.6V,
3.3V, 5.5V
For 500kHz
For shutdown
55
70
45
% of
V CC
CTL Input Current
V CTL = 0V or 5.5V, V IN = V CC = 5.5V
-1
+1
μA
POK (Power-OK)
POK Output Voltage, Low
POK Leakage Current
V FB = 0.6V or 1.0V, I POK = 2mA
V POK = 5.5V
100
1
mV
μA
POK Fault Delay Time
From FB to POK, any threshold
25
100
μs
Note 1: Under normal operating conditions, COMP moves between 1.25V and 2.15V as the duty cycle changes from 10% to 90%
and peak inductor current changes from 0 to 3A. Maximum output current is related to peak inductor current, inductor value
input voltage, and output voltage by the following equations:
I OUT _ MAX =
I LIM ? ( 1 ? D ) × t S × V OUT / 2 L
1 + ( 1 ? D ) × t S × ( R NLS + R L ) / 2 L
where V OUT = output voltage; I LIM = current limit of high-side switch; t S = switching period; R L = ESR of inductor; R NLS =
on-resistance of low-side switch; L = inductor. Equations for I LIM and D are shown as follows:
I LIM = I LIM _ DC 100 + V SW
1 ? D
R T
D = OUT O NLS L
where I LIM_DC100 = current limit at D = 100%; R T = transresistance from LX to COMP; V SW = slope compensation (310mV
±20%); D = duty cycle:
V + I ( R + R )
V IN + I O ( R NLS ? R NHS )
where V OUT = output voltage; V IN = input voltage; I O = output current; R L = ESR of inductor; R NHS = on-resistance of high-
side switch; R NLS = on-resistance of low-side switch. See the Typical Application Circuit for external components.
Note 2: Specifications to -40°C are guaranteed by design and not production tested.
Note 3: LX has internal clamp diodes to PGND and IN pins 2 and 4. Applications that forward bias these diodes should take care
not to exceed the IC’s package power dissipation limits.
Note 4: When connected together, the LX output is designed to provide 3.5A RMS current.
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