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| 型号： | MAX8550AETI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 22/29页 |
| 文件大小： | 0K |
| 描述： | IC PWR SUP DDR INTEG 28TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 控制器，DDR |
| 输入电压： | 2 V ~ 28 V |
| 输出数： | 2 |
| 输出电压： | 1.8V，2.5V，0.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-TQFN-EP（5x5） |
| 包装： | 带卷 (TR) |
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Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
I LIM ( VAL ) > I LOAD ( MAX ) - ? ?
? ?
where V GS = V DD = 5V. In addition to the losses above,
allow about 20% more for additional losses because of
MOSFET output capacitances and low-side MOSFET
body-diode reverse-recovery charge dissipated in the
high-side MOSFET that is not well defined in the
MOSFET data sheet. Refer to the MOSFET data sheet
for thermal-resistance specifications to calculate the PC
board area needed to maintain the desired maximum
operating junction temperature with the above-calculat-
ed power dissipations. To reduce EMI caused by
switching noise, add a 0.1μF ceramic capacitor from the
high-side switch drain to the low-side switch source, or
add resistors in series with DH and DL to slow down the
switching transitions. Adding series resistors increases
the power dissipation of the MOSFET, so ensure that
this does not overheat the MOSFET.
MOSFET Snubber Circuit (Buck)
Fast switching transitions cause ringing because of a
resonating circuit formed by the parasitic inductance
and capacitance at the switching nodes. This high-fre-
quency ringing occurs at LX’s rising and falling transi-
tions and can interfere with circuit performance and
generate EMI. To dampen this ringing, an optional
series RC snubber circuit is added across each switch.
Below is a simple procedure for selecting the value of
the series RC of the snubber circuit:
1) Connect a scope probe to measure V LX to PGND1,
and observe the ringing frequency, f R .
2) Estimate the circuit parasitic capacitance (C PAR ) at
LX by first finding a capacitor value, which, when
connected from LX to PGND1, reduces the ringing
frequency by half. C PAR can then be calculated as
1/3rd the value of the capacitor value found.
3) Estimate the circuit parasitic inductance (L PAR ) from
the equation:
The power loss of the snubber circuit (P RSNUB ) is dissi-
pated in the resistor and can be calculated as:
P RSNUB = C SNUB × V IN 2 × f SW
where V IN is the input voltage and f SW is the switching
frequency. Choose an R SNUB power rating that meets
the specific application’s derating rule for the power
dissipation calculated.
Setting the Current Limit (Buck)
The current-sense method used in the MAX8550/
MAX8551 makes use of the on-resistance (R DS(ON) ) of
the low-side MOSFET (Q2 in the Typical Applications
Circuit ). When calculating the current limit, use the worst-
case maximum value for R DS(ON) from the MOSFET data
sheet, and add some margin for the rise in R DS(ON) with
temperature. A good general rule is to allow 0.5% addi-
tional resistance for each 1°C of temperature rise.
The minimum current-limit threshold must be great
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val-
ley of the inductor current occurs at I LOAD(MAX) minus
half the ripple current; therefore:
? I LOAD(MAX) × LIR ?
2
where I LIM(VAL) equals the minimum valley current-limit
threshold voltage divided by the on-resistance of Q2
(R DS(ON)Q2 ). For the 50mV default setting, connect ILIM
to AV DD . In adjustable mode, the valley current-limit
threshold is precisely 1/10th* the voltage seen at ILIM.
For an adjustable threshold, connect a resistive divider
from REF to GND with ILIM connected to the center tap.
The external 250mV to 2V adjustment range corresponds
L PAR =
( 2 π × f R )
1
2
× C PAR
to a 25mV to 200mV valley current-limit threshold. When
adjusting the current limit, use 1% tolerance resistors and
a divider current of approximately 10μA to prevent signifi-
cant inaccuracy in the valley current-limit tolerance.
4) Calculate the resistor for critical dampening (R SNUB )
from the equation: R SNUB = 2 π × f R x L PAR . Adjust
the resistor value up or down to tailor the desired
damping and the peak voltage excursion.
5) The capacitor (C SNUB ) should be at least 2 to 4
times the value of C PAR to be effective.
Foldback Current Limit
Alternately, foldback current limit can be implemented
if the UVP latch option is not available. Foldback cur-
rent limit reduces the power dissipation of external
components so they can withstand indefinite overload
and short circuit, with automatic recovery after the over-
load or short circuit is removed. To implement foldback
current limit, connect a resistor from V OUT to ILIM (R6
in Figure 7 and the Typical Applications Circuit ), in
addition to the resistor-divider network (R4 and R5)
* In the negative direction, the adjustable current limit is typically
-1/8th the voltage seen at ILIM.
22
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX8550ETI | 功能描述:PMIC 解决方案 RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| MAX8550ETI+ | 功能描述:电压模式 PWM 控制器 Integrated DDR Power Supply Solution RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| MAX8550ETI+T | 功能描述:电压模式 PWM 控制器 Integrated DDR Power Supply Solution RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| MAX8550ETI-T | 功能描述:PMIC 解决方案 RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| MAX8550EVKIT | 功能描述:电源管理IC开发工具 RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
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