参数资料
型号: MAX8555EUB+T
厂商: Maxim Integrated
文件页数: 11/17页
文件大小: 0K
描述: IC CNTRLR MOSFET ORING 10-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 电信电源,整流器
FET 型: N 沟道
输出数: 1
内部开关:
延迟时间 - 关闭: 100ns
电源电压: 8 V ~ 13.25 V
电流 - 电源: 2mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-µMAX
包装: 带卷 (TR)
Low-Cost, High-Reliability, 0.5V to 3.3V ORing
MOSFET Controllers
General Description
Critical loads often employ parallel-connected power
supplies with redundancy to enhance system reliability.
The MAX8555/MAX8555A are highly integrated, inex-
pensive MOSFET controllers that provide isolation and
redundant power capability in high-reliability systems.
The MAX8555/MAX8555A are used in 0.5V to 3.3V sys-
tems, and have an internal charge pump to drive the
gates of the N-channel pass elements to V CS+ + 5V.
During startup, the MAX8555/MAX8555A monitor the
voltage drop across the external MOSFETs. Once V CS+
approaches or exceeds the bus voltage (V CS- ), the
MOSFETs are turned on. The MAX8555/MAX8555A fea-
ture a dual-purpose TIMER input. A single external
resistor from TIMER to ground sets the turn-on speed of
the external MOSFETs. Optionally, the TIMER input can
be used as a logic enable input. Once the external
MOSFET is turned on, these controllers monitor the
load, protecting the bus against overvoltage, undervolt-
age, and reverse-current fault conditions. The
MAX8555 is available with a 40mV reverse-current
threshold, while the MAX8555A is available with a
20mV reverse-current threshold.
Overvoltage and undervoltage fault thresholds are
adjustable and can be disabled. The current-limit trip
points are set by the external MOSFETs ’ R DS(ON) ,
reducing component count. An open-drain, logic-low
fault output indicates if an overvoltage, undervoltage, or
reverse-current fault occurs. The MAX8555 and the
MAX8555A can shut down in response to a reverse-
current fault condition as quickly as 200ns.
V DD
V DD is the power-supply input for the MAX8555/
MAX8555A and the input to the internal preregulator.
Bypass V DD to GND with a 0.01μF capacitor. The input
supply range for V DD is 8V to 13.25V. The internal
charge pump is disabled for input voltages above
14.4V (typ). For 3V to 5.5V input voltages, connect V DD
to VL.
VL
VL is the regulated power supply for the
MAX8555/MAX8555A. The MAX8555/MAX8555A moni-
tor VL at all times. During startup the device turns on
when VL rises above VL OK (2.82V typ). After V VL
exceeds VL OK and V CS+ is typically greater than
(V CS- - 100mV), the charge pump turns on and drives
GATE high, turning on the external MOSFETs. For oper-
ation from 3V to 5.5V input supplies, connect VL
to V DD .
TIMER
GATE is the output of the internal charge pump that
drives the external MOSFETS. During startup, the volt-
age at GATE ramps up according to the charge-pump
frequency. At 250kHz, the GATE drive current for the
MAX8555/MAX8555A is 12μA. Increasing the charge-
pump frequency increases the GATE drive current. To
change charge-pump frequency, change the value of
R TIMER . See the Selecting the TIMER Resistor section.
CS+, CS-
The voltage drop across the external MOSFETs is mea-
sured between the CS+ and CS- inputs. CS+ connects
to the positive side of the input voltage. CS- connects to
the positive side of the system bus. The MAX8555/
MAX8555A use the voltage drop across CS+ and CS- to
determine operating mode. I FORWARD is defined as
V CS+ - V CS- and must be greater than 0.01V (typ) to
properly detect an overvoltage fault condition. I REVERSE
is defined as V CS- - V CS+ and must be greater than
0.02V (MAX8555A) or 0.04V (MAX8555) (typ) for a
reverse-current fault. The I FORWARD and I REVERSE
thresholds can be effectively increased by placing an
external divider such as R8 and R9 as shown in Figure 4.
The values shown increase the thresholds by 50%. When
R8 and R9 are used, also add R10 (a parallel combina-
tion of R8 and R9) to eliminate any input offset errors
caused by impedance differences and input-bias-cur-
rent differences.
Fault Conditions
The MAX8555/MAX8555A have an open-drain FAULT
output that signals overvoltage, undervoltage, or
reverse-current fault conditions. During a fault condi-
tion, FAULT is pulled to GND, the charge pump shuts
down, and GATE discharges to CS- in 200ns (typ). See
Table 1 for fault modes.
Undervoltage Fault
The MAX8555/MAX8555A turn off the external
MOSFETs if V UVP falls below the UVP threshold (0.4V).
Connect UVP to the center of a resistor-divider from the
input supply to GND. Once V UVP rises above the UVP
rising threshold (0.5V), FAULT clears and GATE is dri-
ven high. FAULT is not latched. Connect UVP to VL to
disable the undervoltage-protection feature.
Overvoltage Fault
The MAX8555/MAX8555A are protected from overvolt-
age conditions using an adjustable overvoltage-protec-
tion input. A resistor-divider from the output bus to GND
with OVP connected to the center tap sets the overvolt-
age threshold. When V OVP exceeds the OVP threshold
(0.5V) and the device is in the I FORWARD condition
______________________________________________________________________________________
11
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