参数资料
型号: MAX8655EVKIT+
厂商: Maxim Integrated Products
文件页数: 12/23页
文件大小: 0K
描述: KIT EVAL FOR MAX8655
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 1.2V
电流 - 输出: 20A
输入电压: 10.8 ~ 13.2 V
稳压器拓扑结构: 降压
频率 - 开关: 600kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: MAX8655
Highly Integrated, 25A, Wide-Input,
Internal MOSFET, Step-Down Regulator
The valley current is sensed across the on-resistance of
the low-side MOSFET. The valley current limit trips when
the sensed current exceeds the valley current limit.
VL
BST
MAX8655
LXB
Figure 2. High-Side Gate Boost Circuit
High-Side Gate-Drive Supply (BST)
A flying capacitor boost circuit (Figure 2) generates the
gate-drive voltage for the internal high-side n-channel
MOSFET. The capacitor between BST and LXB is
charged from VL to 6.5V minus the diode forward-volt-
age drop while the low-side MOSFET is on. When the
low-side MOSFET is switched off, the stored voltage of
the capacitor is stacked above LXB to provide the nec-
essary turn-on voltage (V GS ) for the high-side MOSFET.
An internal switch between BST and the internal high-
side MOSFET’s gate closes to turn the MOSFET on.
Current-Sense Amplifier
The current-sense circuit amplifies the differential cur-
rent-sense voltage (V CS+ - V CS- ). This amplified cur-
rent-sense signal and the internal-slope-compensation
signal are summed (V SUM ) together and fed into the
PWM comparator’s inverting input. The PWM compara-
tor shuts off the high-side MOSFET when V SUM
exceeds the integrated feedback voltage (V COMP ).
The differential current sense is also used to provide
peak inductor current limiting. This current limit is more
accurate than the valley current limit, which is measured
across the internal low-side MOSFET.
Current-Limit Circuit
The MAX8655 uses both foldback and peak current lim-
iting. The valley foldback current limit is used to reduce
power dissipation of external components—mainly the
inductor, internal power MOSFETs, and the upstream
power source, when the output is severely overloaded
or short circuited and when POK is low. Thus, the circuit
can withstand short-circuit conditions continuously with-
out causing overheating of any component. The peak
constant current limit sets the current-limit point more
accurately since it does not have to suffer the wide vari-
ation of the low-side power MOSFET’s on-resistance
due to tolerance and temperature.
Set the minimum valley current limit when the output
voltage is at its nominal regulated value, higher than
the maximum peak current-limit setting. With this
method, the current-limit point accuracy is controlled
by the peak current limit and is not interfered with by
the wide variation of the MOSFET’s on-resistance. See
the Setting the Current Limit section for how to set
these limits.
The MAX8655 can be configured for either an
adjustable valley current-limit threshold with adjustable
foldback ratio or a fixed valley current limit that latches
the regulator off. To use foldback current limit with
autorecovery, connect MODE to GND. When the latch-off
mode is used, connect MODE to AVL and set the cur-
rent-limit threshold with one resistor from ILIM2 to GND.
Cycle EN or input power to reset the current-limit latch.
The peak current limit is used to sense the inductor cur-
rent, and is more accurate than the valley current limit
because it does not depend upon the on-resistance of
the low-side MOSFET. The peak current can be mea-
sured across the resistance of the inductor for the high-
est efficiency, or alternatively, a current-sense resistor
can be used for more accurate current sensing. A
resistor connected from ILIM1 to GND sets the peak
current-limit threshold.
For more information on the current limit, see the
Setting the Current Limit section.
Switching Frequency and Synchronization
The MAX8655 has an adjustable internal oscillator that
can be set to any frequency from 200kHz to 1MHz. To
set the switching frequency, connect a resistor from
FSYNC to GND.
The MAX8655 can also be synchronized to an external
clock by connecting the clock signal to FSYNC. A syn-
chronization output (SYNCO) is provided to synchronize
a second MAX8655 180° out-of-phase with the first by
connecting SYNCO of the first MAX8655 to FSYNC of the
second. When the first MAX8655 is synchronized to an
external clock, the external clock is inverted to generate
SYNCO. Therefore, to get 180° out-of-phase operation
with an external clock, the clock input to the first
MAX8655 should have a 50% duty cycle. Figure 3 is the
single-phase, 600kHz switching, 10.8V to 13.2V input
and 1.2V/20A output. Figure 4 shows single-phase,
350kHz switching, 6V to 20V input, and 3.3V/20A output.
12
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