参数资料
型号: MAX8655EVKIT+
厂商: Maxim Integrated Products
文件页数: 17/23页
文件大小: 0K
描述: KIT EVAL FOR MAX8655
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 1.2V
电流 - 输出: 20A
输入电压: 10.8 ~ 13.2 V
稳压器拓扑结构: 降压
频率 - 开关: 600kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: MAX8655
Highly Integrated, 25A, Wide-Input,
Internal MOSFET, Step-Down Regulator
Capacitor C11 is connected in parallel with R2 and is
I P ? P = IN OUT × OUT
equal in value with C9.
Add a 100pF (C10) capacitor across the CS+ and CS-
inputs close to the IC.
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitors must meet the ripple-current
requirement (I RMS ) imposed by the switching currents
defined by the following equation:
V ? V V
f S × L V IN
These equations are suitable for initial capacitor selec-
tion, but final values should be chosen based on a pro-
totype or evaluation circuit. As a general rule, a smaller
current ripple results in less output-voltage ripple.
Since the inductor ripple current is a factor of the
inductor value and input voltage, the output-voltage rip-
ple decreases with larger inductance, and increases
with higher input voltages. The MAX8655 is designed to
I RMS =
I LOAD V OUT × ( V IN ? V OUT )
V IN
work with polymer, tantalum, aluminum electrolytic, or
ceramic output capacitors. The aluminum electrolytic
capacitor is the least expensive; however, it has higher
ESR. To compensate for this, use a ceramic capacitor
I RMS has a maximum value when the input voltage
equals twice the output voltage (V IN = 2 x V OUT ), so
I RMS(MAX) = I LOAD /2. Ceramic capacitors are recom-
mended due to the low ESR and ESL at high frequency
with relatively low cost. Choose a capacitor that
exhibits less than 10°C temperature rise at the maxi-
mum operating RMS current for optimum long-term reli-
ability. Ceramic capacitors with an X5R or better
temperature characteristic are recommended.
Output Capacitor
The key selection parameters for the output capacitor
are the actual capacitance value, the equivalent series
resistance (ESR), the equivalent series inductance
(ESL), and the voltage-rating requirements. These
parameters affect the overall stability, output-voltage
ripple, and transient response. The output ripple has
three components: variations in the charge stored in
the output capacitor, the voltage drop across the
capacitor’s ESR, and ESL caused by the current into
and out of the capacitor. The maximum output-voltage
ripple is estimated as follows:
V RIPPLE = V RIPPLE(ESR) + V RIPPLE(C) + V RIPPLE(ESL)
The output-voltage ripple as a consequence of the
ESR, ESL, and output capacitance is:
V RIPPLE ( ESR ) = I P ? P × ESR
in parallel to reduce the switching ripple and noise.
Ceramic capacitors are recommended for high-fre-
quency (500kHz to 1MHz) designs. For reliable and
safe operation, ensure that the capacitor’s voltage and
ripple-current ratings exceed the calculated values.
The response to a load transient depends on the
selected output capacitors. During a load transient, the
output voltage instantly changes by ESR x ? I LOAD .
Before the regulator can respond, the output voltage
deviates further, depending on the inductor and output-
capacitor values. After a short time (see the Typical
Operating Characteristics section), the regulator
responds by regulating the output voltage back to its
nominal state. The regulator response time depends on
its closed-loop bandwidth. With a higher bandwidth,
the response time is faster, thus preventing the output
voltage from further deviation from its regulating value.
Compensation Design
The MAX8655 uses an internal transconductance error
amplifier whose output compensates the control loop.
The external inductor, output capacitor, compensation
resistor, and compensation capacitors determine the
loop stability. The inductor and output capacitor are cho-
sen based on performance, size, and cost. Additionally,
the compensation resistor and capacitors are selected to
optimize control-loop stability. The component values,
shown in Figures 3 and 4, yield stable operation over the
given range of input-to-output voltages.
The regulator uses a current-mode control scheme that
V RIPPLE ( ESL ) =
V IN
L + ESL
× ESL
regulates the output voltage by forcing the required cur-
rent through the external inductor. The voltage drop
across the DC resistance of the inductor or the alternate
V RIPPLE ( C ) =
I P ? P
8 × C OUT × f S
series current-sense resistor is used to measure the
inductor current. Current-mode control eliminates the
double pole in the feedback loop caused by the
where I P-P is the peak-to-peak inductor current.
______________________________________________________________________________________
17
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