参数资料
型号: MAX8725ETI+
厂商: Maxim Integrated Products
文件页数: 13/30页
文件大小: 0K
描述: IC CHARGER BATTERY 28-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
功能: 充电管理
电池化学: 多化学
电源电压: 8 V ~ 28 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 托盘
Multichemistry Battery Chargers with Automatic
System Power Selector
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
NAME
DCIN
LDO
ACIN
REF
GND
PKPRES
ACOK
MODE
IINP
CLS
ICTL
VCTL
CCI
FUNCTION
DC Supply Voltage Input. Bypass DCIN with a 1 μF capacitor to power ground.
Device Power Supply. Output of the 5.4V linear regulator supplied from DCIN. Bypass with a 1μF capacitor.
AC Detect Input. This uncommitted comparator input can be used to detect the presence of the charger ’s
power source. The comparator’s open-drain output is the ACOK signal.
4.2235V Voltage Reference. Bypass with a 1μF capacitor to GND.
MAX1909: Ground this pin.
MAX8725: Pull PKPRES high to disable charging. Used for detecting presence of battery pack.
AC Detect Output. High-voltage open-drain output is high impedance when ACIN is greater than 2.048V.
The ACOK output remains a high impedance when the MAX1909/MAX8725 are powered down.
Trilevel Input for Setting Number of Cells and Asserting the Conditioning Mode:
MODE = GND; asserts conditioning mode.
MODE = float; charge with 3 times the cell voltage programmed at VCTL.
MODE = LDO; charge with 4 times the cell voltage programmed at VCTL.
Input Current Monitor Output. The current delivered at the IINP output is a scaled-down replica of the
system load current plus the input-referred charge current sensed across CSSP and CSSN inputs. The
transconductance of (CSSP - CSSN) to IINP is 3mA/V.
Source Current-Limit Input. Voltage input for setting the current limit of the input source.
Input for Setting Maximum Output Current
Input for Setting Maximum Output Voltage
Output Current-Regulation Loop-Compensation Point. Connect 0.01μF to GND.
13
CCV
Voltage-Regulation Loop-Compensation Point. Connect 10k
in series with 0.1μF to GND.
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
CCS
GND
BATT
CSIN
CSIP
PGND
DLO
DLOV
DHIV
DHI
SRC
CSSN
CSSP
PDS
PDL
Input Current-Regulation Loop-Compensation Point. Use 0.01μF to GND.
Analog Ground
Battery Voltage Feedback Input
Output Current-Sense Negative Input
Output Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN.
Power Ground
Low-Side Power-MOSFET Driver Output. Connect to low-side NMOS gate. When the MAX1909/MAX8725 are
shut down, the DLO output is low.
Low-Side Driver Supply. Bypass with a 1μF capacitor to ground.
High-Side Driver Supply. Bypass with a 0.1 μF capacitor to SRC.
High-Side Power-MOSFET Driver Output. Connect to high-side PMOS gate. When the MAX1909/MAX8725
are shut down, the DHI output is high .
Source Connection for Driver for PDS/PDL Switches. Bypass SRC to power ground with a 1 μF capacitor.
Input Current Sense for Charger (Negative Input)
Input Current Sense for Charger (Positive Input). Connect a current-sense resistor from CSSP to CSSN.
Power-Source PMOS Switch Driver Output. When the MAX1909/MAX8725 are powered down, the PDS output
is pulled to SRC through an internal 1M resistor.
System-Load PMOS Switch Driver Output. When the MAX1909/MAX8725 are powered down, the PDL output
is pulled to ground through an internal 100k resistor.
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