参数资料
型号: MAX8744ETJ+T
厂商: Maxim Integrated Products
文件页数: 31/36页
文件大小: 0K
描述: IC CNTRLR PWR SUP QUAD 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 控制器,笔记本电脑电源系统
输入电压: 6 V ~ 26 V
输出数: 4
输出电压: 3.3V,5V,1 V ~ 26 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 带卷 (TR)
High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers
? ? ( I LOAD ) R DS ( ON )
? V IN ( MAX ) ? ? ?
? 1 ? ?
PD ( N H Re sistive ) = ? OUT ? ( I LOAD DS ( ON )
) 2 R
I LOAD LIMIT ? ?
? Δ I INDUCTOR ?
?
?
Choose a low-side MOSFET (N L ) that has the lowest pos-
sible on-resistance (R DS(ON) ), comes in a moderate-sized
package (i.e., 8-pin SO, DPAK, or D 2 PAK), and is reason-
ably priced. Ensure that the MAX8744/MAX8745 DL_
gate driver can supply sufficient current to support the
gate charge and the current injected into the parasitic
drain-to-gate capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems may
occur. Switching losses are not an issue for the low-side
MOSFET since it is a zero-voltage switched device when
used in the step-down topology.
Power-MOSFET Dissipation
Worst-case conduction losses occur at the duty-factor
extremes. For the high-side MOSFET (N H ), the worst-
case power dissipation due to resistance occurs at mini-
mum input voltage:
? V ?
? V IN ?
Generally, use a small high-side MOSFET to reduce
switching losses at high input voltages. However, the
R DS(ON) required to stay within package power-dissipa-
tion limits often limits how small the MOSFET can be. The
optimum occurs when the switching losses equal the
conduction (R DS(ON) ) losses. High-side switching losses
do not become an issue until the input is greater than
approximately 15V.
Calculating the power dissipation in high-side MOSFETs
(N H ) due to switching losses is difficult, since it must
allow for difficult-to-quantify factors that influence the turn-
on and turn-off times. These factors include the internal
gate resistance, gate charge, threshold voltage, source
inductance, and PCB layout characteristics. The following
switching-loss calculation provides only a very rough esti-
mate and is no substitute for breadboard evaluation,
preferably including verification using a thermocouple
mounted on N H :
PD ( N H Switching ) =
becomes extraordinarily hot when subjected to
V IN(MAX) , consider choosing another MOSFET with
lower parasitic capacitance.
For the low-side MOSFET (N L ), the worst-case power
dissipation always occurs at maximum battery voltage:
PD ( N L Re sistive ) =
? ? V OUT ? ? 2
? ?
The absolute worst case for MOSFET power dissipation
occurs under heavy overload conditions that are
greater than I LOAD(MAX) but are not high enough to
exceed the current limit and cause the fault latch to trip.
To protect against this possibility, “overdesign” the cir-
cuit to tolerate:
= I ?
2
where I LIMIT is the peak current allowed by the current-
limit circuit, including threshold tolerance and sense-
resistance variation. The MOSFETs must have a
relatively large heatsink to handle the overload power
dissipation.
Choose a Schottky diode (D L ) with a forward-voltage
drop low enough to prevent the low-side MOSFET’s
body diode from turning on during the dead time. As a
general rule, select a diode with a DC current rating
equal to a 1/3 the load current. This diode is optional
and can be removed if efficiency is not critical.
Boost Capacitors
The boost capacitors (C BST ) must be selected large
enough to handle the gate-charging requirements of
the high-side MOSFETs. Typically, 0.1μF ceramic
capacitors work well for low-power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side MOSFETs require boost
capacitors larger than 0.1μF. For these applications,
?
?
? V IN ( MAX ) f SW
?
? I LOAD Q G ( SW )
I GATE
+
C OSS V IN ( MAX ) ?
2
select the boost capacitors to avoid discharging the
capacitor more than 200mV while charging the high-
side MOSFETs’ gates:
where C OSS is the output capacitance of N H , Q G(SW) is
the charge needed to turn on the N H MOSFET, and I GATE
is the peak gate-drive source/sink current (1A typ).
C BST =
Q GATE
200 mV
Switching losses in the high-side MOSFET can become
a heat problem when maximum AC adapter voltages
are applied, due to the squared term in the switching-
loss equation (C x V IN 2 x f SW ). If the high-side MOSFET
chosen for adequate R DS(ON) at low battery voltages
where Q GATE is the total gate charge specified in the
high-side MOSFET’s data sheet. For example, assume
the FDS6612A n-channel MOSFET is used on the high
side. According to the manufacturer’s data sheet, a sin-
gle FDS6612A has a maximum gate charge of 13nC
______________________________________________________________________________________
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