参数资料
型号: MAX8758ETG+T
厂商: Maxim Integrated Products
文件页数: 9/20页
文件大小: 0K
描述: IC REG STEP UP 24-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 转换器,TFT,LCD
输入电压: 1.8 V ~ 5.5 V
输出数: 1
输出电压: 5V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
供应商设备封装: 24-TQFN-EP(4x4)
包装: 带卷 (TR)
Step-Up Regulator with Switch Control
and Operational Amplifier for TFT LCD
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NAME
GND
GON
CTL
DLP
THR
SUPB
OUTB
NEGB
POSB
N.C.
LDO
OUT
I.C.
SS
COMP
FREQ
IN
LX
SHDN
FB
PGND
MODE
DRN
SRC
FUNCTION
Analog Ground
Internal High-Voltage-Switch Common Connection. GON is the output of the high-voltage-switch-
control block. GON is internally pulled to PGND through a 1k ? resistor in shutdown. See the High-
Voltage Switch Control section for details.
High-Voltage, Switch-Control Block Timing Pin. See the High-Voltage Switch Control section for details.
High-Voltage, Switch-Control Block Delay Pin. Connect a capacitor from DLP to GND to set the delay
time. A 5μA current source charges C DLP . DLP is internally pulled to GND by a resistor in shutdown.
See the High-Voltage Switch Control section for details.
GON Falling Regulation Adjustment Pin. Connect THR to the center of a resistive voltage-divider
between LDO or OUT and GND to adjust the V GON falling regulation level. The actual regulation level
is 10 x V THR . See the High-Voltage Switch Control section for details.
Operational Amplifier Supply Input. Bypass SUPB to GND with a 0.1μF capacitor.
Operational Amplifier Output
Operational Amplifier Inverting Input
Operational Amplifier Noninverting Input
No Connection. Not internally connected.
5V Internal Linear Regulator Output. This regulator powers all internal circuitry except the operational
amplifier. Bypass LDO to GND with a 0.22μF or greater ceramic capacitor.
Internal Linear Regulator Supply Pin. OUT is the supply input of the internal 5V linear regulator.
Connect OUT directly to the output of the step-up regulator.
Internally Connected. Make no connection to this pin.
Soft-Start Control Pin. Connect a capacitor between SS and GND to set the soft-start period of the
step-up regulator. See the Bootstrapping and Soft-Start section for details.
Error Amplifier Compensation Pin. See the Step-Up Regulator Loop Compensation section for details.
Frequency-Select Pin. Connect FREQ to GND for 600kHz operation, and connect FREQ to IN for
1.2MHz operation.
Supply Pin. Bypass IN to GND with a 1μF ceramic capacitor. Place the capacitor close to the IN pin.
Switching Node. LX is the drain of the internal power MOSFET. Connect the inductor and the Schottky
diode to LX and minimize trace area for low EMI.
Shutdown Control Pin. Pull SHDN low to turn off the step-up regulator, the operational amplifier, and
the switch control block.
Feedback Pin. The FB regulation point is 1.24V (typ). Connect FB to the center of a resistive voltage-
divider between the step-up regulator output and GND to set the step-up regulator output voltage.
Place the divider close to the FB pin.
Power Ground
High-Voltage, Switch-Control Block-Mode Selection Timing-Adjustment Pin. See the High-Voltage
Switch Control section for details. MODE is high impedance when it is connected to LDO. MODE is
internally pulled down by a 1k ? resistor during UVLO, when V DLP < 0.5 x V LDO , or in shutdown.
High-Voltage, Switch-Control Input. DRN is the drain of the internal high-voltage p-channel MOSFET
connected to GON.
High-Voltage Switch-Control Input. SRC is the source of the internal high-voltage p-channel MOSFET.
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