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| 型号： | MAX8784ETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC REG STP UP W/AMP 40-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | LCD 电视机/监控器 |
| 电源电压： | 4 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（5x5） |
| 包装： | 带卷 (TR) |
Step-Up Regulator, Internal Charge Pumps, Switch
Control, and Operational Amplifier for TFT LCDs
ELECTRICAL CHARACTERISTICS (continued)
(V CC = +5V, Circuit of Figure 1, AVDD = SUP = +14V, T A = 0°C to +85°C . Typical values are at T A = +25°C, unless otherwise noted.)
PARAMETER
FB Transconductance
LX Current Limit
CONDITIONS
? I COMP = ±2.5μA, FB = COMP
V FB = 1.1V, duty cycle = 75%
MIN
75
3.5
TYP
160
4.0
MAX
280
4.6
UNITS
μS
A
LX On-Resistance
Current-Sense Transresistance
Soft-Start Period
I LX = 1.0A
7-bit current ramp
0.10
0.10
0.20
3
0.19
0.26
?
V/A
ms
POSITIVE CHARGE-PUMP REGULATOR
V SUP Input Supply Range
6
19
V
V SUP Overvoltage Charge-Pump Inhibit
FBP Regulation Voltage
FBP Line Regulation Error
FBP Input Bias Current
POUT Output-Voltage Range
POUT Fixed Output Voltage
POUT Output Current Limit
V SUP = rising, typical hysteresis = 200mV
V SUP = 10V ~ 19V, V POUT = 28V
V FBP = 1.5V
I VGON = 0mA
HVS = V CC , I POUT = 0mA
Not in dropout, V SUP = 9V, V POUT = 24V
20
1.225
-100
29.1
20
21
1.25
0.1
30
50
22
1.275
+100
36
30.9
V
V
%/V
nA
V
V
mA
C1N, C2N High-Side On-Resistance
C1N, C2N Low-Side On-Resistance
C1P Switch On-Resistance
C2P Switch On-Resistance
POUT Switch On-Resistance
9.0
6.0
15.0
10.0
10.0
?
?
?
?
?
FBP Fault-Trip Level
Falling edge
0.96
1.00
1.04
V
Positive Charge-Pump Soft-Start Period 7-bit voltage ramp
NEGATIVE CHARGE-PUMP REGULATOR
3
ms
FBN Regulation Voltage
FBN Input Bias Current
FBN Line Regulation Error
V REF - V FBN
V FBN = 250mV
V SUP = 11V to 19V, VGOFF = -9V, I VGOFF = -20mA
0.985
-50
1.00
0.1
1.015
+50
V
nA
%/V
DRVN PCH On-Resistance
DRVN NCH On-Resistance
10
6
?
?
FBN Fault-Trip Level
Rising edge
450
mV
Negative Charge-Pump Soft-Start Period 7-bit voltage ramp
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
CTL Input-Low Voltage
CTL Input-High Voltage
1.8
3
0.8
ms
V
V
CTL Input Current
CTL-to-GON Rising Propagation Delay
CTL-to-GON Falling Propagation Delay
CTL = 0V or V CC
-1
200
200
+1
μA
ns
ns
GON-to-POUT Switch On-Resistance
V GDEL = 1.5V, CTL = V CC
10
20
?
GON-to-POUT Switch Saturation Current
GON-to-DRN Switch On-Resistance
GON-to-DRN Switch Saturation Current
GON-to-PGND Switch On-Resistance
V POUT - V GON > 5V
V GDEL = 1.5V, CTL = 0V
V GON - V DRN > 5V
V GDEL = 1.0V
180
35
100
60
mA
?
mA
k ?
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