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参数资料
| 型号： | MAX8795AGCJ+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 24/31页 |
| 文件大小： | 0K |
| 描述： | IC CONV DC-DC TFT-LCD 32LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 应用： | 转换器，TFT，LCD |
| 输入电压： | 2.5 V ~ 6 V |
| 输出数： | 8 |
| 输出电压： | 2.5 V ~ 18 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 带卷 (TR) |
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TFT-LCD DC-DC Converter with
Operational Amplifiers
and gate-off linear-regulator controllers are 0.1mA.
Therefore, the base-to-emitter resistor for both linear
regulators should be chosen to set 0.1mA bias current:
4) Next, calculate the pole set by the linear regulator’s
feedback resistance and the capacitance between
FB_ and AGND (including stray capacitance):
R BE =
= ≈ 6 . 8 k ?
V BE 0 . 7 V
0 . 1 mA 0 . 1 mA
The output capacitor and the load resistance create the
f POLE _ FB =
1
2 π × C FB × ( R UPPER || R LOWER )
f POLE _ LR =
f POLE _ ESR =
dominant pole in the system. However, the internal
amplifier delay, pass transistor’s input capacitance,
and the stray capacitance at the feedback node create
additional poles in the system, and the output capaci-
tor’s ESR generates a zero. For proper operation, use
the following equations to verify the linear regulator is
properly compensated:
1) First, determine the dominant pole set by the linear
regulator’s output capacitor and the load resistor:
I LOAD ( MAX )_ LR
2 π × C OUT _ LR × V OUT _ LR
The unity-gain crossover of the linear regulator is:
f CROSSOVER = A V_LR f POLE_LR
2) The pole created by the internal amplifier delay is
approximately 1MHz:
f POLE_AMP = 1MHz
3) Next, calculate the pole set by the transistor’s input
capacitance, the transistor’s input resistance, and
the base-to-emitter pullup resistor:
where CFB is the capacitance between FB_ and
AGND, R UPPER is the upper resistor of the linear regu-
lator’s feedback divider, and R LOWER is the lower resis-
tor of the divider.
5) Next, calculate the zero caused by the output
capacitor’s ESR:
1
2 π × C OUT _ LR × R ESR
where RESR is the equivalent series resistance of
COUT_LR.
To ensure stability, choose C OUT_LR large enough so
the crossover occurs well before the poles and zero
calculated in steps 2 to 5. The poles in steps 3 and 4
generally occur at several megahertz, and using
ceramic capacitors ensures the ESR zero occurs at
several megahertz as well. Placing the crossover below
500kHz is sufficient to avoid the amplifier-delay pole
and generally works well, unless unusual component
choices or extra capacitances move one of the other
f POLE _ IN =
1
2 π × C IN × ( R BE || R IN )
poles or the zero below 1MHz.
Applications Information
C IN =
, R IN =
where :
g m h FE
2 π f T g m
g m is the transconductance of the pass transistor, and f T
is the transition frequency. Both parameters can be found
in the transistor’s data sheet. Because RBE is much
greater than RIN, the above equation can be simplified:
Power Dissipation
An IC’s maximum power dissipation depends on the
thermal resistance from the die to the ambient environ-
ment and the ambient temperature. The thermal resis-
tance depends on the IC package, PCB copper area,
other thermal mass, and airflow.
The MAX8795A, with its exposed backside paddle sol-
dered to 1in 2 of PCB copper and a large internal ground
f POLE _ IN =
1
2 π × C IN × R IN
plane layer, can dissipate approximately 2.76W into
+70 ° C still air. More PCB copper, cooler ambient air,
and more airflow increase the possible dissipation, while
f POLE _ IN = T
Substituting for CIN and RIN yields:
f
h FE
less copper or warmer air decreases the IC’s dissipation
capability. The major components of power dissipation
are the power dissipated in the step-up regulator and
the power dissipated by the operational amplifiers.
24
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