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| 型号： | MAX8811EEE+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 7/11页 |
| 文件大小： | 0K |
| 描述： | IC DRVR DL PHASE HS 16-QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 配置： | 高端和低端，同步 |
| 输入类型： | 差分 |
| 延迟时间： | 20ns |
| 电流 - 峰： | 6A |
| 配置数： | 4 |
| 输出数： | 4 |
| 电源电压： | 4.5 V ~ 7 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 带卷 (TR) |
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
Detailed Description
Principles of Operation
Table 1. Components for Figure 3, 800kHz,
20A/Phase Typical Application Circuit
MOSFET Gate Drivers (DH_, DL_)
DH_ is driven high when the PWM_ is high; DL_ is dri-
ven high when PWM_ is low. PWM pulsewidths under
20ns (typ) are rejected, and no switching occurs.
The low-side drivers (DL_) have typical 0.9 Ω sourcing
resistance and 0.4 Ω sinking resistance, and are capable
of driving 3000pF capacitive loads with 11ns typical rise
and 8ns typical fall times. The high-side drivers (DH_)
have typical 1.0 Ω sourcing resistance and 0.7 Ω sinking
resistance, and are capable of driving 3000pF capaci-
tive loads with 14ns typical rise and 9ns typical fall times.
This facilitates fast switching, reducing switching losses,
and makes the MAX8811 ideal for both high-frequency
and high-output current applications.
Shoot-Through Protection
Adaptive shoot-through protection is incorporated for
the switching transition after the high-side MOSFET is
turned off and before the low-side MOSFET is turned
on. The low-side driver is turned on when the LX volt-
age falls below 2.5V, or after 135ns typical delay,
whichever occurs first. Furthermore, the delay time
between the low-side MOSFET turn-off and high-side
MOSFET turn-on can be adjusted by selecting the
value of R1 (see the Setting the Dead Time section).
Undervoltage Lockout (UVLO)
When the voltage at the VL1/VL2 connection is below
the UVLO threshold, all driver outputs are held low. This
prevents switching when the supply voltage is too low
for proper operation.
Thermal Protection
Thermal-overload protection limits total power dissipa-
tion in the MAX8811. When the junction temperature
DESIGNATION
C1
C2
C3
C4, C5
C6–C9
L1, L2
Q1, Q3
Q2
Q4
R1
DESCRIPTION
2 x 10μF ±20%, X7R
25V capacitor
12103D106MAT2W
2 x 10μF ±20%, X7R
25V capacitor
12103D106MAT2W
2.2μF ±20%, 10V X5R
capacitor
GRM39X5R225K10
0.22μF ±20%, 10V
X7R capacitors
GRM39X7R224K10
100μF ±20%, 6.3V
X5R capacitors
C3225X5R0J107M
0.2μH, 28A inductors
FDV0630-
R20M,1.9m Ω DCR
HAT2168, 8m Ω , 30V
MOSFET
2 x HAT2164H, 3m Ω ,
30V, MOSFET
2 x HAT2164H, 3m Ω ,
30V MOSFET
Dead-time delay
programming resistor;
see Programmable
Delay vs. R DLY in the
Typical Operating
Characteristics
MANUFACTURER
AVX
AVX
Murata
Murata
TDK
TOKO
Renesas
Renesas
Renesas
—
exceeds +165°C, all driver outputs are held low. The IC
resumes normal operation after the junction tempera-
ture cools by 15°C (typ).
Boost Capacitor Selection
The MAX8811 uses a bootstrap circuit to generate the
supply voltages for the high-side drivers (DH_). The select-
ed high-side MOSFET determines the appropriate boost
capacitance values, according to the following equation:
where Q GATE is the total gate charge of the high-side
MOSFET and Δ V BST is the voltage variation allowed on
the high-side MOSFET drive. Choose Δ V BST = 0.1V to
0.2V when determining C BST . Low-ESR ceramic capaci-
tors should be used.
VL_ Decoupling
VL1 and VL2 provide the supply voltage for the low-side
drivers. The decoupling capacitors at VL_ also charge the
C BST =
Q GATE
Δ V BST
BST capacitors during the time period when DL_ is high.
Therefore, the decoupling capacitor C3 for VL_ should be
large enough to minimize the ripple voltage during
switching transitions. Choose the VL capacitor approxi-
mately 10 times the value of the BST capacitor value.
_______________________________________________________________________________________
7
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