参数资料
型号: MAX8830EWE+T
厂商: Maxim Integrated
文件页数: 7/16页
文件大小: 0K
描述: IC LED DRVR WHITE BCKLGT 16-UCSP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
拓扑: 线性(LDO),PWM,升压(升压)
输出数: 5
内部驱动器:
类型 - 主要: 背光,闪灯/白光
类型 - 次要: 白色 LED
频率: 750kHz ~ 1.25MHz
电源电压: 2.7 V ~ 5.5 V
输出电压: 3.8 V ~ 5.2 V
安装类型: 表面贴装
封装/外壳: 16-WLP
供应商设备封装: 16-WLP(2x2)
包装: 带卷 (TR)
工作温度: -40°C ~ 85°C
LED Light Management IC in
2.5mm x 2.5mm UCSP
Pin Description
UCSP
BUMP
A1
A2
A3
A4
C1
B1
B2
D1
B3
B4
C2
C3
C4
D2
D3
D4
NAME
FLED
PGND
LX
OUT
LED1
LED2
LED3
LED4
MVON
IN
FLEN
SCL
COMP
GND
SDA
V DD
FUNCTION
Flash LED Current-Sink Regulator. Current flowing into FLED is based on the internal I 2 C registers.
Connect FLED to the cathode of an external flash LED or LED module. FLED is high impedance during
shutdown. If unused, FLED may be shorted to ground or left unconnected.
Power Ground. Connect PGND to GND and to the input capacitor ground. Connect PGND to the PCB
ground plane.
Inductor Connection. Connect LX to the switched side of the inductor. LX is internally connected to the
drains of the internal MOSFETs. LX is high impedance in shutdown.
Regulator Output. Connect OUT to the anodes of the external LEDs. OUT can also be used to supply
other circuits, such as audio amplifiers. Bypass OUT to PGND with a 10μF or larger ceramic capacitor.
During shutdown, V OUT is one diode drop below the V IN .
LED Current-Sink Regulators. Current flowing into LED_ is based on the internal I 2 C registers. Connect
LED_ to the cathodes of external LEDs. LED_ is high impedance during shutdown. If unused, LED_ can
be shorted to ground or left unconnected.
Movie On Logic Input. Connect to V DD or drive with logic 1 to enable the movie mode. The FLED movie
current is set in the I 2 C registers. Connect to GND or drive with logic 0 to turn off the movie mode. The
movie mode is also enabled through the I 2 C interface.
Analog Supply Voltage Input. The input voltage range is 2.7V to 5.5V. Bypass IN to GND and PGND with
a 10μF ceramic capacitor as close as possible to the IC. IN is high impedance during shutdown.
Flash Enable Logic Input. A transition from logic 0 to logic 1 on FLEN initiates the flash mode. The flash
duration and FLED flash current are set in I 2 C registers. The flash mode terminates when either FLEN
transitions back to logic 0 or after the flash-duration timer expires.
I 2 C Clock Input. Data is read on the rising edge of SCL.
Compensation Input. See the COMP Network Selection section for details.
Analog Ground. Connect GND to PGND and to the input capacitor ground. Connect GND to the PCB
ground plane.
I 2 C Data Input. Data is read on the rising edge of SCL.
Logic Input Supply Voltage. Connect V DD to the logic supply driving SCL, SDA, MVON, and FLEN.
Bypass V DD to GND with a 0.1μF ceramic capacitor. Setting V DD = 0 places the part in shutdown.
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