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参数资料
| 型号： | MAX8855ETJ+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 5A DL 32TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.6 V ~ 3.24 V |
| 输入电压： | 2.35 V ~ 3.6 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 1MHz ~ 2MHz |
| 电流 - 输出： | 5A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 32-TQFN-EP（5x5） |
Dual, 5A, 2MHz Step-Down Regulators
In DDR tracking applications such as Figure 7, the FB1
regulation voltage tracks the voltage at REFIN. In Figure
7, the output of regulator 1 tracks V OUT2 , and the ratio
of the output voltages is set as follows:
tions in which size and transient response are impor-
tant, an LIR of around 40% to 50% is recommended.
Once all the parameters are chosen, the inductor value
is determined as follows:
V OUT 1
V OUT 2
=
R 19
R 1 + R 19
L =
V OUT × ( V IN ? V OUT )
f S × V IN × LIR × I OUT ( MAX )
Setting the Switching Frequency
The MAX8855/MAX8855A have an adjustable internal
oscillator that can be set to any frequency from 500kHz
to 2MHz. To set the switching frequency, connect a
resistor from FSYNC to GND. Calculate the resistor
value from the following equation:
where f S is the switching frequency. Choose a standard
value close to the calculated value. The exact inductor
value is not critical and can be adjusted to make trade-
offs among size, cost, and efficiency. Find a low-loss
inductor with the lowest possible DC resistance that fits
the allotted dimensions. The peak inductor current is
determined as:
R FSYNC = ?
? 50 ns ? ?
? ? 10 k Ω ?
? ? 950 ns ?
I PEAK = ? 1 +
? × I OUT ( MAX )
? 1
? f S
?
?
?
LIR ?
2 ?
The MAX8855/MAX8855A can also be synchronized to
an external clock from 500kHz to 2MHz by connecting
the clock signal to FSYNC through a 10k Ω isolation
resistor. The external sync frequency must be higher
than the frequency that would be produced by R FSYNC .
The two regulators switch at the same frequency as the
FSYNC clock, and are 180° out-of-phase with each
other. The external clock duty cycle may range
between 10% and 90% to ensure 180° out-of-phase
operation.
Setting the Soft-Start Time
The two step-down regulators have independent
adjustable soft-start. Capacitors from SS_ to GND are
I PEAK must not exceed the chosen inductor’s saturation
current rating or the minimum current-limit specification
for the MAX8855/MAX8855A.
Input-Capacitor Selection
The input capacitor for each regulator serves to reduce
the current peaks drawn from the input power supply
and reduces switching noise in the IC. The total input
capacitance for each rail must be equal to or greater
than the value given by the following equation to keep
the input-voltage ripple within specifications and mini-
mize the high-frequency ripple current being fed back
to the input source:
charged from a constant 8μA (typ) current source to the
feedback-regulation voltage. The value of the soft-start
capacitors is calculated from the desired soft-start time
C IN _ MIN _ =
D _ × I OUT _
f SW × V IN _ RIPPLE _
as follows:
where D_ is the quiescent duty cycle (V OUT_ /V IN_ ); f SW
C SS _ = t SS × ?
? 8 μ A ?
? 0 . 6 V ?
?
Inductor Selection
There are several parameters that must be examined
when determining which inductor to use: maximum
input voltage, output voltage, load current, switching
frequency, and LIR. LIR is the ratio of inductor current
ripple to DC load current. A higher LIR value allows for
a smaller inductor, but results in higher losses and
higher output ripple. On the other hand, higher inductor
values increase efficiency, but eventually resistive loss-
es due to extra turns of wire exceed the benefit gained
from lower AC current levels. A good compromise
between size and efficiency is a 30% LIR. For applica-
is the switching frequency; and V IN_RIPPLE_ is the
peak-to-peak input-ripple voltage, which should be less
than 2% of the minimum DC input voltage.
The impedance of the input capacitor at the switching
frequency should be less than that of the input source
so high-frequency switching currents do not pass
through the input source but are instead shunted
through the input capacitor. High source impedance
requires high-input capacitance. The input capacitor
must meet the ripple current requirement imposed by
the switching currents. The RMS input ripple current,
I RIPPLE_ , is given by:
I RIPPLE _ = I OUT _ × D _ × ( 1 ? D _)
______________________________________________________________________________________
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