参数资料
型号: MAX9320ESA+T
厂商: Maxim Integrated Products
文件页数: 7/10页
文件大小: 0K
描述: IC CLOCK BUFFER 2:2 3GHZ 8-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 扇出缓冲器(分配)
电路数: 1
比率 - 输入:输出: 2:2
差分 - 输入:输出: 是/是
输入: HSTL,LVECL,LVPECL
输出: LVECL,LVPECL
频率 - 最大: 3GHz
电源电压: 2.25 V ~ 3.8 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
MAX9320/MAX9320A
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
6
_______________________________________________________________________________________
Pin Description (MAX9320)
Pin Description (MAX9320A)
PIN
MAX/SO
SOT23
NAME
FUNCTION
18
Q0
Noninverting Q0 Output. Typically terminate with 50
resistor to VCC - 2V.
27
Q0
Inverting Q0 Output. Typically terminate with 50
resistor to VCC - 2V.
36
Q1
Noninverting Q1 Output. Typically terminate with 50
resistor to VCC - 2V.
45
Q1
Inverting Q1 Output. Typically terminate with 50
resistor to VCC - 2V.
52
VEE
Negative Supply Voltage
64
D
Inverting Differential Input. 60k
pullup to VCC and 100k pulldown to VEE.
73
D
Noninverting Differential Input. 100k
pulldown to VEE.
81
VCC
Positive Supply Voltage. Bypass from VCC to VEE with 0.1F and 0.01F ceramic
capacitors. Place the capacitors as close to the device as possible with the smaller
value capacitor closest to the device.
PIN
SOT23
NAME
FUNCTION
1VCC
Positive Supply Voltage. Bypass from VCC to VEE with 0.1F and 0.01F ceramic
capacitors. Place the capacitors as close to the device as possible with the smaller value
capacitor closest to the device.
2VEE
Negative Supply Voltage
3
D
Inverting Differential Input. 60k
pullup to VCC and 100k pulldown to VEE.
4D
Noninverting Differential Input. 100k
pulldown to VEE.
5
Q1
Inverting Q1 Output. Typically terminate with 50
resistor to VCC - 2V.
6Q1
Noninverting Q1 Output. Typically terminate with 50
resistor to VCC - 2V.
7
Q0
Inverting Q0 Output. Typically terminate with 50
resistor to VCC - 2V.
8Q0
Noninverting Q0 Output. Typically terminate with 50
resistor to VCC - 2V.
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