- 您现在的位置：买卖IC网 > PDF目录8679 > MAX9321EKA+T (Maxim Integrated Products)IC CLOCK/DATA DRVR 1:1 8SOIC PDF资料下载
参数资料
| 型号： | MAX9321EKA+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 7/9页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK/DATA DRVR 1:1 8SOIC |
| 标准包装： | 2,500 |
| 类型： | 时钟/数据驱动器 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 是/是 |
| 输入： | HSTL，LVECL，LVPECL |
| 输出： | LVECL，LVPECL |
| 频率 - 最大： | 3GHz |
| 电源电压： | 2.25 V ~ 3.8 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | * |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
Detailed Description
The MAX9321/MAX9321A are low-skew differential
receiver/drivers designed for clock and data distribu-
tion. For interfacing to differential HSTL and LVPECL
signals, these devices operate over a +2.25V to +3.8V
supply range, allowing high-performance clock and
data distribution in systems with a nominal +2.5V or
+3.3V supply. For differential LVECL operation, these
devices operate from a -2.25V to -3.8V supply.
Inputs
The differential input can be configured to accept a sin-
gle-ended input when operating at approximately VCC -
VEE = 3.0V to 3.8V. This is accomplished by connect-
ing the on-chip reference voltage, VBB, to an input as a
reference. For example, the differential D, D input is
converted to a noninverting, single-ended input by con-
necting VBB to D and connecting the single-ended
input to D. An inverting input is obtained by connecting
VBB to D and connecting the single-ended input to D.
With the differential input configured as single ended
(using VBB), the single-ended input can be driven to
VCC and VEE or with a single-ended LVPECL/LVECL
signal.
When the differential input is configured as a single-
ended input (using VBB), the approximate supply range
is VCC - VEE = 3.0V to 3.8V. This is because one of the
inputs must be VEE + 1.2V or higher for proper opera-
tion of the input stage. VBB must be at least VEE + 1.2V
because it becomes the high-level input when the other
(single-ended) input swings below it. Therefore, mini-
mum VBB = VEE + 1.2V.
The minimum VBB output is VCC - 1.510V. Substituting
the minimum VBB into VBB = VEE + 1.2V results in a
minimum supply of 2.71V. Rounding up to a standard
supply gives the single-ended operating supply range
of VCC - VEE = 3.0V to 3.8V.
MAX9321/MAX9321A
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
_______________________________________________________________________________________
7
(CONNECTED TO D)
VIL
VIH
VBB
VOH - VOL
VOH
VOL
Q
D
Figure 1. Switching with Single-Ended Input
0 (DIFFERENTIAL)
80%
20%
80%
20%
0 (DIFFERENTIAL)
VOH - VOL
VIHD - VILD
VIHD
VILD
VOH
VOL
Q
tPLHD
tPHLD
tR
tF
D
(Q) - (Q)
Figure 2. Differential Transition Time and Propagation Delay Timing Diagram
相关PDF资料 |
PDF描述 |
|---|---|
| V300A15H500B3 | CONVERTER MOD DC/DC 15V 500W |
| MAX9321EUA+ | IC CLOCK/DATA DRIVER 1:1 8-UMAX |
| V300A15H500B2 | CONVERTER MOD DC/DC 15V 500W |
| MAX9320EUA+ | IC CLOCK BUFFER 2:2 3GHZ 8-UMAX |
| DAC8512FSZ-REEL7 | IC DAC 12BIT SRL LP 5V 8SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX9321ESA | 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL LVPECL/LVECL/HSTL RECEIVER/DRIVE - Rail/Tube 制造商:Rochester Electronics LLC 功能描述: |
| MAX9321EUA | 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL LVPECL/LVECL/HSTL RECEIVER/DRIVE - Rail/Tube |
| MAX9321EUA+ | 功能描述:总线收发器 LVPECL/LVECL/HSTL Receiver/Driver RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| MAX9321EUA+T | 功能描述:时钟驱动器及分配 LVPECL/LVECL/HSTL Receiver/Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MAX9322ECY+ | 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL DIVIDE-BY-1/DIVIDE-BY-2 CLOCK DRVR 52TQFP - Rail/Tube |
发布紧急采购，3分钟左右您将得到回复。