- 您现在的位置：买卖IC网 > PDF目录8921 > MAX9485ETP+T (Maxim Integrated Products)IC CLOCK GENERATOR AUD 20-TQFN PDF资料下载
参数资料
| 型号： | MAX9485ETP+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GENERATOR AUD 20-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 时钟发生器 |
| PLL： | 是 |
| 输入： | LVCMOS，LVTTL，晶体 |
| 输出： | LVCMOS，LVTTL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:3 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 73.728MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 供应商设备封装： | 20-TQFN-EP（4x4） |
| 包装： | 带卷 (TR) |
MAX9485
Programmable Audio Clock Generator
4
_______________________________________________________________________________________
Note 1: All parameters tested at TA = +25°C. Specifications over temperature are guaranteed by design and characterization.
Note 2: When X1 is used as an external reference.
Note 3: Guaranteed by design and characterization; limits are set at ±6 sigma.
Note 4: Includes crystal accuracy.
Note 5: FXTL = 27MHz. Nominal frequency.
Note 6: See frequency selection paragraph in the Applications Information section.
Note 7: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 8: Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 VDD and 0.7 VDD.
Note 9: Bus sink current is less than 6mA. Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 VDD and
0.7 VDD.
Note 10: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
I2C TIMING CHARACTERISTICS
(VDD = VDD_P = 3.0V to 3.6V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C, VDD = VDD_P = 3.3V;
Figure 7.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Serial Clock
fSCL
400
kHz
Bus Free Time Between a STOP and
a START Condition
tBUF
1.3
s
Hold Time (Repeated) START
Condition
tHD, STA
0.6
s
Repeated START Condition Setup
Time
tSU, STA
0.6
s
STOP Condition Setup Time
tSU, STO
0.6
s
Data Hold Time
tHD,DAT
(Note 7)
0.05
0.9
s
Data Setup Time
tSU,DAT
100
ns
SCL Clock Low Period
tLOW
1.3
s
SCL Clock High Period
tHIGH
0.6
s
Rise Time of SDA and SCL, Receiving
tR
(Notes 3, 8)
20 + 0.1Cb
300
ns
Fall Time of SDA and SCL, Receiving
tF
(Notes 3, 8)
20 + 0.1Cb
300
ns
Fall Time of SDA, Transmitting
tF
(Notes 8, 9)
20 + 0.1Cb
250
ns
Pulse Width of Spike Suppressed
tSP
(Notes 3, 10)
0
50
ns
Capacitive Load for Each Bus Line
Cb
400
pF
相关PDF资料 |
PDF描述 |
|---|---|
| MS3120P16-26S | CONN RCPT 26POS WALL MNT W/SCKT |
| MCP4901-E/P | DAC 8BIT SGL W/SPI 8PDIP |
| MCP4901-E/MS | DAC 8BIT SGL W/SPI 8MSOP |
| VE-B1M-MV-F1 | CONVERTER MOD DC/DC 10V 150W |
| MAX9485EUP+T | IC CLOCK GEN PROG 20TSSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX9485EUP | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MAX9485EUP+ | 功能描述:时钟发生器及支持产品 Programmable Audio Clock Generator RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MAX9485EUP+T | 功能描述:时钟发生器及支持产品 Programmable Audio Clock Generator RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MAX9485EUP-T | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MAX9485EVKIT | 制造商:Maxim Integrated Products 功能描述:PROGRAMMABLE AUDIO CLOCK GENERATOR - Bulk |
发布紧急采购，3分钟左右您将得到回复。