- 您现在的位置：买卖IC网 > PDF目录10965 > MAX9526AEI/V+ (Maxim Integrated Products)IC VID DECODER NTSC/PAL 28QSOP PDF资料下载
参数资料
| 型号： | MAX9526AEI/V+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 11/38页 |
| 文件大小： | 0K |
| 描述： | IC VID DECODER NTSC/PAL 28QSOP |
| 其它有关文件： | Automotive Product Guide |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 50 |
| 类型： | 视频解码器 |
| 应用： | 车载系统，播放器，电视 |
| 电压 - 电源，模拟： | 1.8V |
| 电压 - 电源，数字： | 1.8V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 28-QSOP |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页当前第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页
Low-Power, High-Performance
NTSC/PAL Video Decoder
transition on SDA while SCL is high (Figure 11). A START
condition from the master signals the beginning of a
transmission to the MAX9526. The master terminates
transmission, and frees the bus, by issuing a STOP con-
dition. The bus remains active if a REPEATED START
condition is generated instead of a STOP condition.
Early STOP Conditions
The MAX9526 recognizes a STOP condition at any
point during data transmission except if the STOP con-
dition occurs in the same high pulse as a START condi-
tion. For proper operation, do not send a STOP
condition during the same SCL high pulse as the
START condition.
Slave Address
The slave address is defined as the seven most signifi-
cant bits (MSBs) followed by the read/write bit. For
DEVADR connected to DGND, setting the read/write bit to
1 (slave address = 0x43) configures the MAX9526 for
read mode. Setting the read/write bit to 0 (slave address
= 0x42) configures the MAX9526 for write mode. The
address is the first byte of information sent to the
MAX9526 after the START condition. The MAX9526 slave
address is configurable with DEVADR. Table 5 shows the
addresses of the MAX9526.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9526 uses to handshake receipt each byte of data
when in write mode (see Figure 12). The MAX9526 pulls
down SDA during the entire master-generated 9th clock
pulse if the previous byte is successfully received.
Monitoring ACK allows for detection of unsuccessful
data transfers. An unsuccessful data transfer occurs if
a receiving device is busy or if a system fault has
occurred. In the event of an unsuccessful data transfer,
the bus master retries communication. The master pulls
down SDA during the 9th clock cycle to acknowledge
receipt of data when the MAX9526 is in read mode. An
acknowledge is sent by the master after each read byte
to allow data transfer to continue. A not acknowledge is
sent when the master reads the final byte of data from
the MAX9526, followed by a STOP condition.
Write Data Format
A write to the MAX9526 includes transmission of a
START condition, the slave address with the R/W bit set
to 0, one byte of data to configure the internal register
address pointer, one or more bytes of data, and a
STOP condition. Figure 13 illustrates the proper frame
format for writing one byte of data to the MAX9526.
Figure 14 illustrates the frame format for writing n bytes
of data to the MAX9526.
The slave address with the R/W bit set to 0 indicates
that the master intends to write data to the MAX9526.
The MAX9526 acknowledges receipt of the address
byte during the master-generated 9th SCL pulse.
The second byte transmitted from the master config-
ures the MAX9526’s internal register address pointer.
The pointer tells the MAX9526 where to write the next
byte of data. An acknowledge pulse is sent by the
MAX9526 upon receipt of the address pointer data.
The third byte sent to the MAX9526 contains the data
that is written to the chosen register. An acknowledge
pulse from the MAX9526 signals receipt of the data
byte. The address pointer autoincrements to the next
register address after each received data byte. This
autoincrement feature allows a master to write to
sequential registers within one continuous frame. Figure
14 illustrates how to write to multiple registers with one
frame. The master signals the end of transmission by
issuing a STOP condition.
MAX9526
Maxim Integrated
19
相关PDF资料 |
PDF描述 |
|---|---|
| VE-2NK-IY-F1 | CONVERTER MOD DC/DC 40V 50W |
| VE-B4T-IX-B1 | CONVERTER MOD DC/DC 6.5V 75W |
| VE-2NJ-IY-F3 | CONVERTER MOD DC/DC 36V 50W |
| VI-BWH-IY-F4 | CONVERTER MOD DC/DC 52V 50W |
| VE-B4L-IX-B1 | CONVERTER MOD DC/DC 28V 75W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX9526ATJ/V+ | 功能描述:视频 IC Low-Power High-Performance NTSC/PAL Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| MAX9526ATJ/V+T | 功能描述:视频 IC Low-Power High-Performance NTSC/PAL Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| MAX9526ATJ+ | 功能描述:视频 IC NTSC/PAL Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| MAX9526ATJ+T | 功能描述:视频 IC NTSC/PAL Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| MAX9526EVKIT+ | 功能描述:视频 IC 开发工具 MAX9526 Eval Kit RoHS:否 制造商:Texas Instruments 产品:Evaluation Boards 类型:YPbPr to RGBHV Converters 工具用于评估:LMH1251 工作电源电压:5 V |
发布紧急采购，3分钟左右您将得到回复。