参数资料
型号: MAX9526ATJ+
厂商: Maxim Integrated Products
文件页数: 17/38页
文件大小: 0K
描述: IC VID DECODER NTSC/PAL 32-TQFN
其它有关文件: Automotive Product Guide
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
类型: 视频解码器
应用: 车载系统,播放器,电视
电压 - 电源,模拟: 1.8V
电压 - 电源,数字: 1.8V
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x6)
包装: 管件
Low-Power, High-Performance
NTSC/PAL Video Decoder
525 Line Video Interrupt Enable (IL525)
1 = Change in L525 bit status triggers a hardware
interrupt.
0 = No interrupt on L525 changes (default).
This interrupt is masked by the HLOCK and LSTLCK
status. Changes in the L525 status triggers a hardware
interrupt only when HLOCK = 1 and LSTLCK = 0. See
register 0x01, B6.
Analog Copy Protection Interrupt Enable (IACP)
1 = Any change in ACP status bit (register 0x01, B0)
triggers a hardware interrupt.
0 = No interrupt on analog copy protection changes
(default).
See register 0x01, B0.
REG
B7
B6
B5
B4
B3
B2
B1
B0
0x02
IVID1
IVID2
0
ICTHR
IADCOVR
IHLOCK
INONSTD
ILSTLCK
Interrupt Mask Register 0
REG
B7
B6
B5
B4
B3
B2
B1
B0
0x03
0
IL525
0
IACP
Interrupt Mask Register 1
Active Video 1 Interrupt (IVID1)
1 = Change in VID1 bit status triggers a hardware
interrupt.
0 = No interrupt on VID1 changes (default).
See register 0x00, B7.
Active Video 2 Interrupt (IVID2)
1 = Change in VID2 bit status triggers a hardware
interrupt.
0 = No interrupt on VID2 changes (default).
See register 0x00, B6.
Color Kill Threshold Interrupt (ICTHR)
1 = Transition in CTHR bit from 0 to 1 triggers a hard-
ware interrupt.
0 = No interrupt on CTHR changes (default).
See register 0x00, B4.
ADC Out-of-Range Interrupt Enable (IADCOVR)
1 = Change in ADCOVR bit from 0 to 1 triggers a
hardware interrupt.
0 = No interrupt on ADCOVR changes (default).
See register 0x00, B3.
Horizontal Lock Interrupt Enable (IHLOCK)
1 = Change in HLOCK bit from 1 to 0 triggers a
hardware interrupt.
0 = No interrupt on HLOCK changes (default).
See register 0x00, B2.
Nonstandard Video Interrupt Enable (INONSTD)
1 = Change in NONSTD bit from 0 to 1 triggers a
hardware interrupt.
0 = No interrupt on NONSTD changes (default).
See register 0x00, B1.
Demodulator Lock Interrupt Enable (ILSTLCK)
1 = Change in LSTLCK bit from 0 to 1 triggers a
hardware interrupt.
0 = No interrupt on LSTLCK changes (default).
See register 0x00, B0.
MAX9526
24
Maxim Integrated
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