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参数资料
| 型号： | MAX9860ETG+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 26/38页 |
| 文件大小： | 0K |
| 描述： | IC CODEC MONO AUD 16BIT 24TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 75 |
| 类型： | 音频编解码器 |
| 数据接口： | 串行 |
| 分辨率（位）： | 16 b |
| ADC / DAC 数量： | 1 / 2 |
| 三角积分调变： | 是 |
| 动态范围，标准 ADC / DAC (db)： | 81 / 90 |
| 电压 - 电源，模拟： | 1.7 V ~ 1.9 V |
| 电压 - 电源，数字： | 1.7 V ~ 1.9 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 供应商设备封装： | 24-TQFN-EP（4x4） |
| 包装： | 托盘 |
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MAX9860
16-Bit Mono Audio Voice Codec
32
Maxim Integrated
Power Management
The MAX9860 includes complete power management
control to minimize power usage. The DAC and both
ADCs can be independently enabled so that only the
required circuitry is active.
Table 11. Power Management Register
REGISTER ADDRESS
B7
B6
B5
B4
B3
B2
B1
B0
0x10
SHDN
0
DACEN
0
ADCLEN
ADCREN
BITS
FUNCTION
SHDN
Active-Low Software Shutdown
0 = MAX9860 is in full shutdown.
1 = MAX9860 is powered on.
When SHDN = 0. All register settings are preserved and the I2C interface remains active.
DACEN
DAC Enable
0 = DAC disabled.
1 = DAC enabled.
ADCLEN/ADCREN
ADC Left/Right Enable
0 = Left/right ADC disabled.
1 = Left/right ADC enabled.
The left ADC must be enabled when using the right ADC.
Revision Code
The MAX9860 includes a revision code to allow easy
identification of the device revision. The current revision
code is 0x40.
Table 12. Revision Code Register
ADDR
B7
B6
B5
B4
B3
B2
B1
B0
0xFF
REV
I2C Serial Interface
The MAX9860 features an I2C/SMBus-compatible,
2-wire serial interface consisting of a serial-data line
(SDA) and a serial-clock line (SCL). SDA and SCL facili-
tate communication between the MAX9860 and the
master at clock rates up to 400kHz. Figure 6 shows the
2-wire interface timing diagram. The master generates
SCL and initiates data transfer on the bus. The master
device writes data to the MAX9860 by transmitting the
proper slave address followed by the register address
and then the data word. Each transmit sequence is
framed by a START (S) or REPEATED START (Sr) con-
dition and a STOP (P) condition. Each word transmitted
to the MAX9860 is 8 bits long and is followed by an
acknowledge clock pulse. A master reading data from
the MAX9860 transmits the proper slave address fol-
lowed by a series of nine SCL pulses. The MAX9860
transmits data on SDA in sync with the master-generat-
ed SCL pulses. The master acknowledges receipt of
each byte of data. Each read sequence is framed by a
START or REPEATED START condition, a not acknowl-
edge, and a STOP condition. SDA operates as both an
input and an open-drain output. A pullup resistor, typi-
cally greater than 500
, is required on SDA. SCL oper-
ates only as an input. A pullup resistor, typically greater
than 500
, is required on SCL if there are multiple mas-
ters on the bus, or if the single master has an open-
drain SCL output. Series resistors in line with SDA and
SCL are optional. Series resistors protect the digital
inputs of the MAX9860 from high voltage spikes on the
bus lines, and minimize crosstalk and undershoot of the
bus signals.
SMBus is a trademark of Intel Corp.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX9860ETG+ | 功能描述:接口—CODEC 16-Bit Mono Audio Voice CODEC RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| MAX9860ETG+ | 制造商:Maxim Integrated Products 功能描述:AUDIO CODEC 16BIT MONO 24TQFN |
| MAX9860ETG+ | 制造商:Maxim Integrated Products 功能描述:IC AUDIO CODEC 16BIT 48KHZ 制造商:Maxim Integrated Products 功能描述:IC, AUDIO CODEC, 16BIT, 48KHZ, TQFN-24 |
| MAX9860ETG+T | 功能描述:接口—CODEC 16-Bit Mono Audio Voice CODEC RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| MAX9860EVKIT+ | 功能描述:音频 IC 开发工具 MAX9860 Eval Kit RoHS:否 制造商:Texas Instruments 产品:Evaluation Kits 类型:Audio Amplifiers 工具用于评估:TAS5614L 工作电源电压:12 V to 38 V |
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