参数资料
型号: MAX9879ERV+T
厂商: Maxim Integrated Products
文件页数: 18/32页
文件大小: 0K
描述: IC AUDIO SUBSYSTEM 30-UCSP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: DirectDrive®
类型: D 类
输出类型: 2-通道(立体声)带立体声耳机
在某负载时最大输出功率 x 通道数量: 715mW x 2 @ 8 欧姆; 58mW x 2 @ 16 欧姆
电源电压: 2.7 V ~ 5.5 V
特点: 消除爆音,差分输入,I²C,静音,短路和热保护,关机,音量控制
安装类型: 表面贴装
供应商设备封装: 30-UCSP(5x6)
封装/外壳: 30-WFBGA,CSPBGA
包装: 带卷 (TR)
MAX9879
Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
25
Maxim Integrated
1
SCL
START
CONDITION
SDA
28
9
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
Figure 8. Acknowledge
A START (S) condition from the master signals the
beginning of a transmission to the MAX9879. The mas-
ter terminates transmission, and frees the bus, by issu-
ing a STOP condition. The bus remains active if a
REPEATED START (Sr) condition is generated instead of
a STOP condition.
Early STOP Conditions
The MAX9879 recognizes a STOP (P) condition at any
point during data transmission except if the STOP (P)
condition occurs in the same high pulse as a START (S)
condition. For proper operation, do not send a STOP
(P) condition during the same SCL high pulse as the
START (S) condition.
Slave Address
The MAX9879 is preprogrammed with a slave address
of 1001101R/(W). The address is defined as the seven
most significant bits (MSBs) followed by the Read/Write
bit. Setting the Read/Write bit to 1 configures the
MAX9879 for read mode. Setting the Read/Write bit to 0
configures the MAX9879 for write mode. The address is
the first byte of information sent to the MAX9879 after
the START (S) condition.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9879 uses to handshake receipt each byte of data
when in write mode (see Figure 8). The MAX9879 pulls
down SDA during the entire master-generated 9th
clock pulse if the previous byte is successfully
received. Monitoring ACK allows for detection of unsuc-
cessful data transfers. An unsuccessful data transfer
occurs if a receiving device is busy or if a system fault
has occurred. In the event of an unsuccessful data
transfer, the bus master may retry communication.
The master pulls down SDA during the ninth clock
cycle to acknowledge receipt of data when the
MAX9879 is in read mode. An acknowledge is sent by
the master after each read byte to allow data transfer to
continue. A not acknowledge is sent when the master
reads the final byte of data from the MAX9879, followed
by a STOP (P) condition.
Write Data Format
A write to the MAX9879 includes transmission of a
START (S) condition, the slave address with the R/W bit
set to 0, one byte of data to configure the internal regis-
ter address pointer, one or more bytes of data, and a
STOP (P) condition. Figure 9 illustrates the proper
frame format for writing one byte of data to the
SCL
SDA
SSr
P
Figure 7. START (S), STOP (P), and REPEATED START (Sr) Conditions
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MAX987ESA-T 功能描述:校验器 IC Single uPower Comparator RoHS:否 制造商:STMicroelectronics 产品: 比较器类型: 通道数量: 输出类型:Push-Pull 电源电压-最大:5.5 V 电源电压-最小:1.1 V 补偿电压(最大值):6 mV 电源电流(最大值):1350 nA 响应时间: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SC-70-5 封装:Reel