参数资料
型号: MAXQ7665BATM+
厂商: Maxim Integrated Products
文件页数: 38/47页
文件大小: 0K
描述: IC MCU-BASED DAS 16BIT 48-TQFN
标准包装: 43
系列: MAXQ®
核心处理器: RISC
芯体尺寸: 16-位
速度: 8MHz
连通性: CAN,LIN,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 8
程序存储器容量: 64KB(32K x 16)
程序存储器类型: 闪存
RAM 容量: 256 x 16
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.25 V
数据转换器: A/D 8x12b,D/A 1x12b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 48-TQFN 裸露焊盘
包装: 管件
MAXQ7665A–MAXQ7665D
16-Bit RISC Microcontroller-Based
Smart Data-Acquisition Systems
______________________________________________________________________________________
43
REGISTER
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
————
——
MSRDY
ETI
ERI
INTRQ
EXTRQ
MTRQ
ROW/
TIH
DTUP
C0M14C
(M4,
1Eh)
0000
00
0
————
——
MSRDY
ETI
ERI
INTRQ
EXTRQ
MTRQ
ROW/
TIH
DTUP
C0M15C
(M4,
1Fh)
0000
00
0
————
——
VIOBI1
VIOBI0
VDBI1
V
DBI0
V
DBR1
VDBR0
VMC
(M5,
0h)
0000
00
0
S
VIBE
VDBE
VDPE
PGG2
PGG1
PGG0
TSE
PGAE
DACE
ADCE
APE
(M5,
1h)
0000
01
0
ADCMX4
ADCMX3
ADCMX2
ADCMX1
ADCMX0
ADCDIF
ADCBIP
ADCDUL
ADCASD
ADCBY
ADCS2
ADCS1
ADCS0
ACNT
(M5,
2h)
0000
00
0
————
——
D
A
C
L
D
2
D
A
C
L
D
1
D
A
C
L
D
0
DCNT
(M5,
3h)
0000
00
0
————
DACI.11
DACI.10
DACI.9
DACI.8
DACI.7
DACI.6
DACI.5
DACI.4
DACI.3
DACI.2
DACI.1
DACI.0
DACI
(M5,
4h)
0000
00
0
————
D
ACO.11
DACO.10
DACO.9
DACO.8
DACO.7
DACO.6
DACO.5
DACO.4
DACO.3
DACO.2
DACO.1
DACO.0
DACO
(M5,
6h)
0000
00
0
————
A
D
C
D
.1
1
A
DCD.10
ADCD.9
ADCD.8
ADCD.7
ADCD.6
ADCD.5
ADCD.4
ADCD.3
ADCD.2
ADCD.1
ADCD.0
ADCD
(M5,
8h)
0000
00
0
TSO.15
TSO.14
TSO.13
TSO.12
TSO.11
TSO.10
TSO.9
T
SO.8
TSO.7
TSO.6
TSO.5
TSO.4
TSO.3
T
SO.2
T
SO.1
TSO.0
TSO
(M5,
9h)
0000
00
0
————
——
HFFIE
VIOBIE
DVBIE
AORIE
ADCIE
AIE
(M5,
Ah)
0000
00
0
1
VIOLVL
DVLVL
XHFRY
HFFINT
VIOBI
DVBI
ADCOV
ADCRY
ASR
(M5,
Bh)
0000
00
0
————
HFOC1
HFOC0
HFIC1
H
FIC0
ADCCD2
ADCCD1
ADCCD0
EXTHF
RCE
HFE
OSCC
(M5,
Ch)
0000
00
0
1
0
Table
5.
Peripheral
Register
Bit
Functions
and
Reset
Values
(continued)
Bits
indicated
by
"—"
are
unused.
Bits
indicated
by
"ST"
reflect
the
input
signal
state.
Bits
indicated
by
"S"
are
only
affected
by
a
POR
and
not
by
other
forms
of
reset.
These
bits
are
set
to
0
after
a
POR.
Bits
indicated
by
"DB"
have
read/write
access
only
in
background
or
debug
mode.
These
bits
are
cleared
after
a
POR.
Bits
indicated
by
"DW"
are
only
written
to
in
debug
mode.
These
bits
are
cleared
after
a
POR.
The
OSCC
register
is
cleared
to
0002h
after
a
POR
and
is
not
affected
by
other
forms
of
reset.
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