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| 型号： | MAXQ7667AACM/V+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 8/40页 |
| 文件大小： | 0K |
| 描述： | IC MCU-BASED DAS 16BIT 48-LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 250 |
| 系列： | MAXQ® |
| 核心处理器： | RISC |
| 芯体尺寸： | 16-位 |
| 速度： | 16MHz |
| 连通性： | LIN，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，POR，WDT |
| 输入/输出数： | 16 |
| 程序存储器容量： | 32KB（16K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 2K x 16 |
| 电压 - 电源 (Vcc/Vdd)： | 2.25 V ~ 2.75 V |
| 数据转换器： | A/D 5x12b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 48-LQFP |
| 包装： | 托盘 |
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MAXQ7667
16-Bit, RISC, Microcontroller-Based,
Ultrasonic Distance-Measuring System
16
______________________________________________________________________________________
Detailed Description
The ultrasonic distance-measurement peripherals in the
MAXQ7667 include a burst signal generator for
acoustic transmission and mixed signal circuits for
amplifying and digitizing echo signals ranging between
25kHz and 100kHz. The burst signal is a square wave
with adjustable duty cycle and pulse count. The burst is
derived either directly from the system clock or from a
programmable PLL locked to the system clock. The
MAXQ7667 effectively digitizes the echo signals
received at the ECHOP and ECHON inputs using an
LNA, sigma-delta ADC with variable analog gain ampli-
fier, noise-limiting digital bandpass filter, digital full-
wave rectifier, and a digital lowpass filter (see the
Typical Application Circuit/Functional Diagram). The
device detects echo signals at the burst frequency with
amplitudes ranging from 10VP-P to 100mVP-P. Echoes
greater than 100mVP-P and less than 2VP-P are internal-
ly clipped but do not saturate the receiver. To optimize
echo reception, the clock used for processing the echo
locks to the burst frequency. The MAXQ7667’s burst
generator can generate higher frequencies, but the
maximum usable frequency for the echo receive path is
100kHz . For applications requiring transducer frequen-
cies above 100kHz, implement an external echo
receive path. The SAR ADC can then digitize the fil-
tered echo envelope.
An integrated 16-bit RISC C (MAXQ20) provides tim-
ing control, signal processing, and data I/O. The 16-bit
Harvard architecture RISC core executes most instruc-
tions in a single clock cycle from instruction fetch to
cycle completion. The MAXQ20 provides optimal per-
formance for noise-sensitive analog applications.
The MAXQ7667 includes a 13.5MHz RC oscillator,
external crystal oscillator, watchdog timer, schedule
timer, three general-purpose Type 2 timers/counters,
two 8-bit GPIO ports, SPI interface, JTAG interface, LIN
capable UART interface, 12-bit SAR ADC with five mul-
tiplexed input channels, supply-voltage monitors, and a
voltage reference for communication, diagnostics, and
miscellaneous support.
Burst Controller
The MAXQ7667 provides a square-wave burst signal at
the BURST output. Use the burst control to transmit an
ultrasonic signal. Typical applications use the burst sig-
nal to switch an external transistor that drives a high-
voltage transformer, which excites the transducer (see
the
Typical Application Circuit/Functional Diagram).
Use software to configure the duty cycle, frequency,
number of pulses, and drive current of the burst. See
Section 17 of the
MAXQ7667 User’s Guide.
Derive the burst signal either directly from the system
clock or from a programmable oscillator phase locked
to the system clock (Figure 1). Using the system clock
limits the burst frequency to one of 16 choices. Integer
division of the system clock generates these 16 fre-
quencies. The PLL allows a fractional division of the
system clock. Any frequency within the PLL range is
selectable to a resolution of 0.13% or better.
When using the internal PLL, connect external filter
components (C1, R1, and C2) to FILT as shown in
Figure 1. These components filter the analog voltage
that controls the VCO in the PLL. The filter component
values shown in the figure are suitable for the entire
PLL frequency range.
MAXQ7667
C2
330pF
SYSTEM
CLOCK
(fSYSCLK)
ECHO
RECEIVE
CLOCK
PLL
C1
33nF
FILT
R1
24k
PWM
2mVP-P
DIAGNOSTIC
BURST
1
0
BTRN.10:BCKS
BPH[9:0]
PLLF[10:9]:PLLC[1:0]
BTRN[15:12]:BDIV[3:0]
BTRN[7:0]:BCNT[7:0]
BPH.15:BSTT
BTRN.9:BTRI
BPH.14:BDS
BTRN.11:BPOL
BTRN.8:BGT
BURST
PLLF[8:0]
BURST CLOCK
GENERATOR
RECEIVE CLOCK
PRESCALE
Figure 1. Burst Transmission Stage
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAXQ7667EVKIT | 功能描述:开发板和工具包 - 其他处理器 RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
| MAXQ7667EVKIT+ | 功能描述:开发板和工具包 - 其他处理器 MAXQ7667 Eval Kit RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
| MAXQ7667EVKIT-1# | 功能描述:开发板和工具包 - 其他处理器 MAXQ7667EVKIT-1# RoHS:否 制造商:Maxim Integrated 产品: 工具用于评估: 核心: 接口类型: 工作电源电压: |
| MAXQ7668AACM/V+ | 功能描述:16位微控制器 - MCU Integrated Circuits (ICs) Embedded - Microcontrollers - ADC 12BIT 8CH SER 2.7V LQFP RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| MAXQ7668AACM/V+T | 功能描述:16位微控制器 - MCU Integrated Circuits (ICs) Embedded - Microcontrollers - ADC 12BIT 8CH SER 2.7V LQFP RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
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