参数资料
型号: MB8504S064AF-67
厂商: Fujitsu Limited
英文描述: CMOS 4M×64Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4M×64位 同步动态RAM)
中文描述: 4米× 64位的CMOS同步动态随机存取存储器(SDRAM)的CMOS(4分× 64位同步动态RAM)的
文件页数: 1/20页
文件大小: 388K
代理商: MB8504S064AF-67
DS05-11119-1E
FUJITSU SEMICONDUCTOR
DATA SHEET
MEMORY
Un-buffered
4 M
×
SYNCHRONOUS DYNAMIC RAM DIMM
64 BIT
MB8504S064AF-100/-84/-67
168-pin, 4 Clock, 2-bank, based on 2 M
×
8 BIT SDRAMs with SPD
I
DESCRIPTION
The Fujitsu MB8504S064AF is a fully decoded, CMOS Synchronous Dynamic Random Access Memory (SDRAM)
Module consisting of sixteen MB81117822A devices which organized as two banks of 2 M
serial EEPROM on a 168-pin glass-epoxy substrate.
The MB8504S064AF features a fully synchronous operation referenced to a positive edge clock whereby all
operations are synchronized at a clock input which enables high performance and simple user interface
coexistence.
The MB8504S064AF is optimized for those applications requiring high speed, high performance and large memory
storage, and high density memory organizations.
This module is ideally suited for workstations, PCs, laser printers, and other applications where a simple interface
is needed.
×
8 bits and a 2 K-bit
I
PRODUCT LINE & FEATURES
Parameter
MB8504S064AF-100
100 MHz max.
10 ns max. (CL = 3)
15 ns max. (CL = 2)
54 ns max.
24 ns max.
8.5 ns max. (CL = 3)
9 ns max. (CL = 2)
4752 mW max.
MB8504S064AF-84
84 MHz max.
12 ns max. (CL = 3)
17 ns max. (CL = 2)
56 ns max.
26 ns max.
8.5 ns max. (CL = 3)
9 ns max. (CL = 2)
4464 mW max.
115.2 mW max.
MB8504S064AF-67
67 MHz max.
15 ns max. (CL = 3)
20 ns max. (CL = 2)
60 ns max.
30 ns max.
9 ns max. (CL = 3)
10 ns max. (CL = 2)
4176 mW max.
Clock Frequency
Burst Mode Cycle Time
RAS Access Time
CAS Access Time
Output Valid from Clock
Power
Dissipation
Burst Mode
Power Down Mode
Un-buffered 168-pin DIMM Socket Type
(Lead pitch: 1.27 mm)
Conformed to JEDEC Standard (4 CLK)
Organization: 4,194,304 words
×
64 bits
Memory: MB81117822A (2 M
×
8, 2-bank)
×
16 pcs.
3.3 V
±
0.3 V Supply Voltage
All input/output LVTTL compatible
2048 Refresh Cycle every 32.8 ms
Auto and Self Refresh
CKE Power Down Mode
DQM Byte Masking (Read/Write)
Serial Presence Detect (SPD) with Serial EEPROM
Module size:
1.0” (height)
×
5.25” (length)
×
0.157” (thick)
相关PDF资料
PDF描述
MB8504S064AF-84 CMOS 4M×64Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4M×64位 同步动态RAM)
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