参数资料
型号: MB88154APNF-G-113-JNERE1
厂商: FUJITSU LTD
元件分类: 时钟产生/分配
英文描述: 40 MHz, OTHER CLOCK GENERATOR, PDSO8
封装: 3.90 X 5.05 MM, 1.75 MM HEIGHT, 1.27 MM PITCH, PLASTIC, SOP-8
文件页数: 6/20页
文件大小: 541K
代理商: MB88154APNF-G-113-JNERE1
MB88154A
14
DS04-29129-2E
■ LOCK-UP TIME
If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock
signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin)
+ (the lock-up time “tLK”).
For the input clock stabilization time, check the characteristics of the resonator or oscillator used.
Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output
clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cycle-
cycle jitter cannot be guaranteed. It is therefore advisable to perform processing such as cancelling a reset
of the device at the succeeding stage after the lock-up time.
3.0 V
VDD
XIN
SEL0,
SEL1
VIH
CKOUT
Internal clock
stabilization wait time
tLK
(lock-up time )
Setting pin
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